/*
 * promise_ide.c
 *
 * This driver supports promise IDE controlers:
 *
 * o PDC20262
 * o PDC20265
 * o PDC20267
 *
 * This file is not a 'standalone' driver and is assumed to be included
 * by syslib.c. This is why you don't see any other include files other than
 * the promise_ide.h include file.
 *
 * I'm not quite sure of the history of this driver, but modified for PDC20265
 * by wkc 3/4/03, and includes the above comments.
 */

#define LEAN_AND_MEAN 0                     /* 1 means try 20262, 20267, 
                                                 and 20265 in that order      */
                                            /* 0 means try 20265 only         */
#define PDC202XX_DECODE_REGISTER_INFO 0     /* 1 means print out register info*/
                                            /* 0 means do not print out 
                                                 register info                */
#ifdef PROMISE_DEBUG
#undef PROMISE_DEBUG
#endif
//#define PROMISE_DEBUG 1 
						 /* 1 means add some level of data 
						    print out for debug          */
						 /* 0 means no debug prints        */

#if PROMISE_DEBUG
#define DbgPrint(a) logMsg a
#else
#define DbgPrint(a)
#endif

IMPORT VOIDFUNCPTR _func_sysAtaInit;
static UINT32 baseAddress[6];
static int config_chipset_for_dma (int ctrl, int drive);

#include "promise_ide.h"

/* A Register */

#define    SYNC_ERRDY_EN  0xC0

#define    SYNC_IN        0x80    /* control bit, different for master vs. slave drives */
#define    ERRDY_EN       0x40    /* control bit, different for master vs. slave drives */
#define    IORDY_EN       0x20    /* PIO: IOREADY */
#define    PREFETCH_EN    0x10    /* PIO: PREFETCH */

#define    PA3            0x08    /* PIO"A" timing */
#define    PA2            0x04    /* PIO"A" timing */
#define    PA1            0x02    /* PIO"A" timing */
#define    PA0            0x01    /* PIO"A" timing */

/* B Register */

#define    MB2            0x80    /* DMA"B" timing */
#define    MB1            0x40    /* DMA"B" timing */
#define    MB0            0x20    /* DMA"B" timing */

#define    PB4            0x10    /* PIO_FORCE 1:0 */

#define    PB3            0x08    /* PIO"B" timing */    /* PIO flow Control mode */
#define    PB2            0x04    /* PIO"B" timing */    /* PIO 4 */
#define    PB1            0x02    /* PIO"B" timing */    /* PIO 3 half */
#define    PB0            0x01    /* PIO"B" timing */    /* PIO 3 other half */

/* C Register */

#define    IORDYp_NO_SPEED 0x4F
#define    SPEED_DIS       0x0F

#define    DMARQp          0x80
#define    IORDYp          0x40
#define    DMAR_EN         0x20
#define    DMAW_EN         0x10

#define    MC3             0x08    /* DMA"C" timing */
#define    MC2             0x04    /* DMA"C" timing */
#define    MC1             0x02    /* DMA"C" timing */
#define    MC0             0x01    /* DMA"C" timing */

#define ide_dma_on          OK
#define ide_dma_off_quietly ERROR
#define ide_dma_off         OK


UINT32 GetPromiseBaseAddress(int baseaddress)
{
  return baseAddress[baseaddress];
}
#if PDC202XX_DECODE_REGISTER_INFO
/* usually only on for debug */

#define REG_A        0x01
#define REG_B        0x02
#define REG_C        0x04
#define REG_D        0x08

static void decode_registers (unsigned char registers, unsigned char value)
{
    unsigned char    bit = 0, bit1 = 0, bit2 = 0;

    switch(registers) {
        case REG_A:
            bit2 = 0;
            printf("A Register ");
            if (value & 0x80) printf("SYNC_IN ");
            if (value & 0x40) printf("ERRDY_EN ");
            if (value & 0x20) printf("IORDY_EN ");
            if (value & 0x10) printf("PREFETCH_EN ");
            if (value & 0x08) { printf("PA3 ");bit2 |= 0x08; }
            if (value & 0x04) { printf("PA2 ");bit2 |= 0x04; }
            if (value & 0x02) { printf("PA1 ");bit2 |= 0x02; }
            if (value & 0x01) { printf("PA0 ");bit2 |= 0x01; }
            printf("PIO(A) = %d ", bit2);
            break;
        case REG_B:
            bit1 = 0;bit2 = 0;
            printf("B Register ");
            if (value & 0x80) { printf("MB2 ");bit1 |= 0x80; }
            if (value & 0x40) { printf("MB1 ");bit1 |= 0x40; }
            if (value & 0x20) { printf("MB0 ");bit1 |= 0x20; }
            printf("DMA(B) = %d ", bit1 >> 5);
            if (value & 0x10) printf("PIO_FORCED/PB4 ");
            if (value & 0x08) { printf("PB3 ");bit2 |= 0x08; }
            if (value & 0x04) { printf("PB2 ");bit2 |= 0x04; }
            if (value & 0x02) { printf("PB1 ");bit2 |= 0x02; }
            if (value & 0x01) { printf("PB0 ");bit2 |= 0x01; }
            printf("PIO(B) = %d ", bit2);
            break;
        case REG_C:
            bit2 = 0;
            printf("C Register ");
            if (value & 0x80) printf("DMARQp ");
            if (value & 0x40) printf("IORDYp ");
            if (value & 0x20) printf("DMAR_EN ");
            if (value & 0x10) printf("DMAW_EN ");

            if (value & 0x08) { printf("MC3 ");bit2 |= 0x08; }
            if (value & 0x04) { printf("MC2 ");bit2 |= 0x04; }
            if (value & 0x02) { printf("MC1 ");bit2 |= 0x02; }
            if (value & 0x01) { printf("MC0 ");bit2 |= 0x01; }
            printf("DMA(C) = %d ", bit2);
            break;
        case REG_D:
            printf("D Register ");
            break;
        default:
            return;
    }
    printf("\n        %s ", (registers & REG_D) ? "DP" :
                (registers & REG_C) ? "CP" :
                (registers & REG_B) ? "BP" :
                (registers & REG_A) ? "AP" : "ERROR");
    for (bit=128;bit>0;bit/=2)
        printf("%s", (value & bit) ? "1" : "0");
    printf("\n");
}
#endif /* PDC202XX_DECODE_REGISTER_INFO */


int BusNo, DeviceNo, FuncNo;
int udma=1;
extern ULONG vxTicks;

#if 0
int
ataInitPromise()
{
 STATUS status;
 int    vector;
 unsigned char udma_speed_flag;
 unsigned char primary_mode;
 unsigned char secondary_mode;
 int i;
 UINT32 romAddress;

// struct timespec waittime;
// volatile_noncached int *marker = 0xc0000010 + 0x18100000;
// printf("here\n");
// waittime.tv_sec = 0;
// waittime.tv_nsec = 50000;
// *marker = 0xDEADBEEF;     

   DbgPrint(("IN Promise initilization!\n",0,0,0,0,0,0));
   //
   // find PROMISE ultra-100 ide option card
   // the logic here is that only one controller type can be 
   // present in the system. For LEAN_AND_MEAN, we only look 
   // for the 20265 (assumption here is that this is for the DVD
   // system that only contains a 20265)
   //
#if !(LEAN_AND_MEAN)
   status = pciFindDevice(
               PCI_VENDOR_ID_PROMISE,          /* vendor ID */
               PCI_DEVICE_ID_PROMISE_20262,    /* device ID */
               0,                              /* desired instance of device */
               &BusNo,                         /* bus number */
               &DeviceNo,                      /* device number */
               &FuncNo                         /* function number */
               );
   if (status != OK) {
       status = pciFindDevice(
                   PCI_VENDOR_ID_PROMISE,      /* vendor ID */
                   PCI_DEVICE_ID_PROMISE_20267,/* device ID */
                   0,                          /* desired instance of device */
                   &BusNo,                     /* bus number */
                   &DeviceNo,                  /* device number */
                   &FuncNo                     /* function number */
               );
   }
   if (status != OK)
#endif
   {
       status = pciFindDevice(
               PCI_VENDOR_ID_PROMISE,          /* vendor ID */
               PCI_DEVICE_ID_PROMISE_20265,    /* device ID */
               0,                              /* desired instance of device */
               &BusNo,                         /* bus number */
               &DeviceNo,                      /* device number */
               &FuncNo                         /* function number */
           );
   }
   if (status != OK) {
        DbgPrint(("ERROR: did not find promise card\n",0,0,0,0,0,0));
    return status;
  }

  DbgPrint(("Found promise card\n",0,0,0,0,0,0));

  /*  load up the base address registers */
  for(i=0; i<6; i++) {
    int offset = 0x10 + (i*4);

    status = pciConfigInLong(
                BusNo,             /* bus number */
                DeviceNo,          /* device number */
                FuncNo,            /* function number */
                offset,            /* offset into the configuration space */
                &baseAddress[i]
                );
    if (status != OK) {
      DbgPrint(("PCI 0x%x config failed\n", offset,0,0,0,0,0));
      return status;
    }
    /* clear IO bit (bit 0 in all config registers) bit 1 is reserved */
    baseAddress[i] &= ~3;
  }
  
  vector = sysPciIntPin(BusNo, DeviceNo );

  /*
  ** fixup ataresources from syslib.c
  */

  ataResources[0].resource.ioStart[0] = baseAddress[0];
  ataResources[0].resource.ioStart[1] = baseAddress[1] + 2;
  ataResources[1].resource.ioStart[0] = baseAddress[2];
  ataResources[1].resource.ioStart[1] = baseAddress[3] + 2;

  ataResources[0].intVector = vector;
  ataResources[1].intVector = vector;


  DbgPrint(("BAR[0]:0x%x\nBAR[1]:0x%x\n",baseAddress[0],baseAddress[1],0,0,0,0));

DbgPrint(("udma_speed_flag: 0x%x\n",baseAddress[4]+0x1f,0,0,0,0,0));
  udma_speed_flag = sysInByte(baseAddress[4] + 0x1f);
DbgPrint(("primary_mode: 0x%x\n",baseAddress[4]+0x1a,0,0,0,0,0));
  primary_mode    = sysInByte(baseAddress[4] + 0x001a);
DbgPrint(("secondary_mode: 0x%x\n",baseAddress[4]+0x1b,0,0,0,0,0));
  secondary_mode    = sysInByte(baseAddress[4] + 0x001b);
 
    
#if 0 /* not sure if needed for 20265 (wkcfix) */
 
  /* software reset -  this is required because the bios
     will set UDMA timing on if the hdd supports it. The
     user may want to turn udma off. A bug in the pdc20262
     is that it cannot handle a downgrade in timing from UDMA
     to DMA. Disk accesses after issuing a set feature command
     will result in errors. A software reset leaves the timing
     registers intact, but resets the drives. */

  sysOutByte(baseAddress[4]+0x001f,udma_speed_flag | 0x10);
     
  for (i=0;i<100;i++) {
    sysDelay();
  }
      
  sysOutByte(baseAddress[4]+0x001f,udma_speed_flag & ~0x10);
  for (i=0; i<2000; i++) {
    sysDelay();
  }

  /*
  ** restore BARs
  */
  for (i=0;i<6;i++) {
    int offset = 0x10 + (i*4);
    status = pciConfigOutLong(
                BusNo,            /* bus number */
                DeviceNo,         /* device number */
                FuncNo,           /* function number */
                offset,           /* offset into the configuration space */
                baseAddress[i]    /* data write from offset */
                );
    if (status != OK) {
      DbgPrint(("pciConfigOutLong error\n",0,0,0,0,0,0));
    }
  }
#endif /* 1 */
DbgPrint(("reading romaddress...0x%x\n",&romAddress,0,0,0,0,0));

  pciConfigInLong(
                BusNo,    /* bus number */
                DeviceNo, /* device number */
                FuncNo,   /* function number */
                48,       /* offset into the configuration space */
                &romAddress        /* data write from offset */
                );

#if 0
  // promise ships with bios code, but I can't run it on map.
  if (romAddress) {
     pciConfigOutLong(
                BusNo,                 /* bus number */
                DeviceNo,              /* device number */
                FuncNo,                /* function number */
                48,                    /* offset into the configuration space */
                romAddress | 1         /* data write from offset */
                );
  }
#endif
#if 1
    DbgPrint(("(U)DMA Burst Bit %sABLED Primary %s Mode Secondary %s Mode.\n",
        (udma_speed_flag & 1) ? "EN" : "DIS",
        (primary_mode & 1) ? "MASTER" : "PCI",
        (secondary_mode & 1) ? "MASTER" : "PCI",0,0,0 ));
#endif
DbgPrint(("still alive...\n",0,0,0,0,0,0));
#if 1
  /* force udma mode */
  if (!(udma_speed_flag & 1)) {
    sysOutByte(baseAddress[4] + 0x001f,udma_speed_flag|1);
  }
#endif

DbgPrint(("setitng primary_mode: 0x%x set to 0x%x\n",baseAddress[4]+0x1a,primary_mode|1,0,0,0,0));