/********************** LPS_EXCHANGE    ****************************/

LPS_EXCHANGE:
    R0 = [I0++] || [P5] = R7;
                            // get NMPS value and store A = Qe 
    CC = R2<R7;             // check  A<Qe
    IF !CC JUMP CHECK_SWITCH1;
    [P0++] = R0;            // store NMPS as next index
    P1 = [P5+20];           // fetch output array address
    B[P1++] = R3;           // store output  =  = MPS value
    [P5+20] = P1;           // store P1
    JUMP CALL_RENORME;

CHECK_SWITCH1:      
    R2 = R3 << 0 || R1 = [I0++] || P1 = [P5+20];
                            // fetch NLPS and fetch output address 
    BITTGL(R2,0);           // D =  =  complement of MPS value
    R0 = [I0++] ||  [P0++] = R1;
                            // fetch SWITCH flag and store D value 
    CC = R0 == 1;           // check if SWITCH is set
    R0 = CC;
    B[P1++] = R2;           // store NLPS value as next index
    [P5+20] = P1;
    R3 = R3^R0;             // Compliment MPS value if switch flag is set
    [P0++] = R3;            // store MPS value
    
CALL_RENORME:
    R0 = P2;                // address of structure mqdec

    CALL __arith_decode_renorme;
    
    RETS = [SP++];          // Pop RETS,R7:6,P5 registers
    (R7:6) = [SP++];
    P5 = [SP++];
    RTS;
    NOP;                    // To remove stalls occurring on the board
__arith_decoder_JPEG2000.end:         

/*******************************************************************************
The first byte of compressed data is read and shifted to lower order byte of C 
high register(16-23 bits). New byte is read and C register shifted left by 7 
position and CT is decremented by 7. The interval register A is set to 0x8000, 
same as encoder.

Registers used  : R0-R3, P5.
*******************************************************************************/

.section               program;
.global              __arith_decode_init;
.align                       8;
    
__arith_decode_init:

    P1 = R1;                // Address of input array
    P0 = R0;                // Address of structure mqdec
    [--SP] = P5;            // Push P5
    P5 = R0;            
    R3 = R1-R1(ns) || R1 = B[P1++](Z);
                            // Clear R3 and fetch first input byte 
    R3.L = 0x8000;          // Initialize to load A to 0x8000
    R0 = R1 << 16 || [P0] = R3;
                            // Shift R1 to load Chigh register 
    [P0+4] = R0;            // store C register
    [P0+12] = R1;           // store B register
    [P0+16] = P1;           // store input address where compressed data to be 
                            // fetched
    [P0+20] = R2;           // store address of output array
    R0 = P5;                // address of structure mqdec
    [--SP] = RETS;          // save RETS register

    CALL __arith_decode_bytein;
    RETS = [SP++];
    R0 = [P5+4];            // Fetch C register
    R0 = R0 << 7 || R1 = [P5+8];
                            // fetch CT register 
    R1+= -7;                // decrement CT register by 7
    [P5+8] = R1;            // store CT register
    [P5+4] = R0;            // store C register
    P5 = [SP++];            // Pop P5
    RTS;
    
__arith_decode_init.end:
    
/******************************************************************************
In this procedure one byte of data is read and compensating for any 0xFF byte in
process. It also detects the marker codes which must occur at the end  of a 
scan. If the compressed data is not 0xff new value is inserted to higher order 
8 bits of Clow register. If data is 0xFF next data is read. If next data exceeds
0x8f, then next byte is treated as one of the marker bit. If it is not a marker
code then this byte is added to C register with an alignment such that stuff bit
is added to the lower order bit of C high register.

Registers used  : R0-R3, P0, P1.
*******************************************************************************/

.section            program;
.global            __arith_decode_bytein;
.align                  8;
    
__arith_decode_bytein:

    P0 = R0;                // Address of structure mqdec
    R1 = 0XFF;              // Initialize to 0xff
    R3 = 8;
    R2 = [P0+4];            // Fetch C register
    P1 = [P0+16];           // Address to fetch compressed data
    R0 = [P0+12];           // fetch B register
    CC = R0 == R1;          // check if compressed byte ==0xff
    IF CC JUMP CHK_NEXT_BYTE;
    R0 = B[P1++](Z);        // fetch next compressed byte
    R1 = R0 << 8;			//change from 535 to 533
    [P0+16] = P1;
                            // store address to fetch next byte 
    R2 = R2+R1(NS) || [P0+12] = R0;
                            // store B value 
    [P0+8] = R3;            // store CT register
    [P0+4] = R2;            // store C register
    RTS;
    NOP;                    // To remove stalls occurring on the board
    
CHK_NEXT_BYTE:
    R0 = B[P1++](Z);        // fetch next compressed byte
    R1 = 0X8F; 
    CC = R1<R0;             // check if byte < 0x8f
    IF CC JUMP MARKERBIT;   // if false treat as marker bit
    R1 = 7;                
    R3 = R0 << 9 || [P0+16] = P1;
                            // store address of compressed data 
    R2 = R2+R3(NS) || [P0+12] = R0;
                            // store B register 
    [P0+8] = R1;            // store CT register
    [P0+4] = R2;            // store C register
    RTS;
    NOP;                    // To remove stalls occurring on the board
    
MARKERBIT:
    R3.L = 0XFF00;          // to set higher bits of Clow register to 1
    R3.H = 0;
    R1 = 8;                 // to initialize CT register
    R2 = R2+R3(NS) || [P0+8] = R1;
                            // store CT register 
    [P0+4] = R2;            // store C register
    RTS;
    NOP;                    // To remove stalls occurring on the board


__arith_decode_bytein.end:        
    
/******************************************************************************
In this procedure CT register is compared to zero. If CT== 0, new compressed 
byte is added to Clow register  by calling bytein procedure. Both interval 
register A and C are shifted, one bit at a time until A register is no longer 
less than 0x8000.

Registers used  : R0-R2, P0, P5.
******************************************************************************/
    
.section            program;
.global             __arith_decode_renorme;
.align                    8;
    
__arith_decode_renorme: 

    P0 = R0;                // Address of structure mqdec
    [--SP] = P5;            // push P5
    P5 = R0;
    R0 = [P0++];            // fetch A register
    R1 = [P0++];            // fetch C register
    R2 = [P0];              // fetch CT register

CHECK_CT:
    CC = R2 ==0;            // check if CT==0
    IF CC JUMP GET_BYTE;    // if false jump to shift_a

SHIFT_A:
    R0 = R0 << 1;           // shift A and C register
    R1 = R1 << 1;
    R2+= -1;                // decrement  CT register by 1
    CC = BITTST(R0,15);     // check  if > 0x8000
    IF !CC JUMP CHECK_CT;   // if false jump to check CT
    [P5+8] = R2;
    [P5+4] = R1;            // store CT,C,A registers
    [P5] = R0;
    P5 = [SP++];            // Pop P5
    RTS;
    
GET_BYTE:      
    [--SP] = RETS;          // Push RETS register
    
    [P5+8] = R2;
    [P5+4] = R1;            // store CT,C and A registers
    [P5] = R0;
    R0 = P5;         

    CALL __arith_decode_bytein;
    RETS = [SP++];          // Pop RETS register
    R0 = [P5];              // fetch new values of A,C,CT registers
    R1 = [P5+4]; 
    R2 = [P5+8]; 
    JUMP SHIFT_A;
    
__arith_decode_renorme.end: