;***********************usart receive************************
;*
;* title      :   usart receive
;* targer     :   attiny2313
;* version    :   V01
;* Osc        :   8MHz
;* Create data:   2007.01.10
;* Last updata:   2007.01.10
;* Author     :   sonic
;*
;*************************************************************
 .include"tn2313def.inc"
 .list
 
 .def    temp = r16
;*
;*************************************************************
.cseg
.org $0000
      rjmp    reset      ; reset port
      reti               ; external interrupt request 0
      reti               ; external interrupt request 1
      reti               ; Timer/counter 1 capture event
      reti               ; Timer/counter 1 compare match A
      reti               ; Timer/counter 1 overflow
      reti               ; Timer/counter 0 overflow
      reti               ; Usart0, Rx complete
      reti               ; Usart0 data regrister empty
      reti               ; Usart0 Tx complete
      reti               ; analog comparator
      reti               ; Pin charge interrupt
      reti               ; Timer/counter 1 compare match B
      reti               ; Timer/counter 0 compare match A
      reti               ; Timer/counter 0 compare match B
      reti               ; USI start condition
      reti               ; USI overflow
      reti               ; EEPROM ready
      reti               ; Watchdog Timer overflow
.org    $0014
reset:
      ldi    temp,  low(ramend)        ;set stack address
      out    spl,  temp
      ser    temp
      out    ddrb,  temp
      clr    temp
	  out    portb,  temp
	  out    ubrrh,  temp       ; set ubrr
	  ldi    temp,  51    
	  out    ubrrl,  temp
	  ldi    temp,  (1<<rxen)
	  out    ucsrb,  temp
	  ldi    temp,  (1<<ucsz1)|(1<<ucsz0)
	  out    ucsrc,  temp
	  nop
	  nop
	  nop
wait:
      sbis    ucsra,  rxc
	  rjmp    wait
	  in    temp,  udr
	  nop
	  nop
	  out    portb,  temp
	  nop
	  rjmp    wait