/* PNIC Serial ROM */#define PNIC169_SROM_SIZE	    128#define PNIC169_SROM_WORDS	    64#define	PNIC169_SROM_VERSION_3	0x3/* Serial ROM access macros */#define SROM_VERSION(pSrom)		(UCHAR) *(pSrom+0x12)#define SROM_ILEAF0_OFFSET(pSrom)      	SROM_SHORT (pSrom+0x1b)/* Serial ROM Info Block */#define	IBLK_COMPACT_SIZE		4#define IBLK_IS_COMPACT(pIBlk)	((*(pIBlk) & 0x80) == 0x00)#define	IBLK_IS_EXT(pIBlk)		((*(pIBlk) & 0x80) == 0x80)#define IBLK_IS_EXT0(pIBlk)                                             \	    (IBLK_IS_EXT(pIBlk) && (IBLK_EXT_TYPE(pIBlk) == 0x00))#define IBLK_IS_EXT1(pIBlk)		                                \	    (IBLK_IS_EXT(pIBlk) && (IBLK_EXT_TYPE(pIBlk) == 0x01))    #define IBLK_EXT_SIZE(pIBlk)		(UCHAR) (*(pIBlk+0) & 0x7F)    #define IBLK_EXT_TYPE(pIBlk)		(UCHAR) *(pIBlk+1)#define IBLK_IS_EXT2	0x02	/* Block type 2 */#define IBLK_IS_EXT3	0x03	/* Block type 3 */#define IBLK_IS_EXT4	0x04	/* Block type 4 */#define IBLK_IS_EXT5	0x05	/* Block type 5 *//* Extended format - Block type 0 & 1 - 169 */#define IBLK_COMPACT_MCODE(pIBlk)	(UCHAR) (*pIBlk & 0x7F)#define	IBLK_COMPACT_GPDATA(pIBlk)	(UCHAR) *(pIBlk+1)#define IBLK_COMPACT_CMD(pIBlk)		SROM_SHORT(pIBlk+2)#define IBLK_EXT0_TO_COMPACT(pIBlk)	(UCHAR *)(pIBlk+2)#define IBLK_EXT1_PHY(pIBlk)		(UCHAR) *(pIBlk+2)#define	IBLK_EXT1_INIT_LEN(pIBlk)	(UCHAR) *(pIBlk+3)#define	IBLK_EXT1_INIT_STR(pIBlk)	(UCHAR *)(pIBlk+4)#define	IBLK_EXT1_RESET_LEN(pIBlk)                                           \    (UCHAR) *(IBLK_EXT1_INIT_STR(pIBlk) + IBLK_EXT1_INIT_LEN(pIBlk))#define IBLK_EXT1_RESET_STR(pIBlk)	                                     \    (UCHAR *) (IBLK_EXT1_INIT_STR(pIBlk) + IBLK_EXT1_INIT_LEN(pIBlk) + 1)#define IBLK_EXT1_MEDIA_CAP(pIBlk)                                           \    SROM_SHORT( IBLK_EXT1_RESET_STR(pIBlk) + IBLK_EXT1_RESET_LEN(pIBlk))#define IBLK_EXT1_AUTO_AD(pIBlk)                                             \    SROM_SHORT( IBLK_EXT1_RESET_STR(pIBlk) + IBLK_EXT1_RESET_LEN(pIBlk) + 2)#define	IBLK_EXT1_FD_MAP(pIBlk)                                              \    SROM_SHORT( IBLK_EXT1_RESET_STR(pIBlk) + IBLK_EXT1_RESET_LEN(pIBlk) + 4)#define IBLK_EXT1_TTM_MAP(pIBlk)                                             \    SROM_SHORT( IBLK_EXT1_RESET_STR(pIBlk) + IBLK_EXT1_RESET_LEN(pIBlk) + 6)/* Extended format - Block type 2, 3, 4 & 5 - 169 */#define IBLK_EXT2_MCODE(pIBlk)		(UCHAR) (*(pIBlk + 2) & 0x3F)#define IBLK_EXT2_EXT(pIBlk)		(UCHAR) ((*(pIBlk + 2) & 0x40) >> 6)#define	IBLK_EXT2_MSD_CSR13(pIBlk)	SROM_SHORT(pIBlk + 3)#define	IBLK_EXT2_MSD_CSR14(pIBlk)	SROM_SHORT(pIBlk + 5)#define	IBLK_EXT2_MSD_CSR15(pIBlk)	SROM_SHORT(pIBlk + 7)#define	IBLK_EXT2_GPC(pIBlk)						    \    SROM_SHORT( pIBlk + 3 + ((((UCHAR) *pIBlk) & 0x7F) - 0x6)) #define IBLK_EXT2_GPD(pIBlk)						    \    SROM_SHORT( pIBlk + 5 + ((((UCHAR) *pIBlk) & 0x7F) - 0x6)) #define IBLK_EXT3_PHY(pIBlk)            (UCHAR) *(pIBlk+2)#define IBLK_EXT3_INIT_LEN(pIBlk)       (UCHAR) *(pIBlk+3)#define IBLK_EXT3_INIT_STR(pIBlk)       (UCHAR *)(pIBlk+4)#define IBLK_EXT3_RESET_LEN(pIBlk)                                           \    (UCHAR) *(IBLK_EXT3_INIT_STR(pIBlk) + IBLK_EXT3_INIT_LEN(pIBlk))#define IBLK_EXT3_RESET_STR(pIBlk)                                           \    (UCHAR *) (IBLK_EXT3_INIT_STR(pIBlk) + IBLK_EXT3_INIT_LEN(pIBlk) + 1)#define IBLK_EXT3_MEDIA_CAP(pIBlk)                                           \    SROM_SHORT( IBLK_EXT3_RESET_STR(pIBlk) + IBLK_EXT3_RESET_LEN(pIBlk))#define IBLK_EXT3_AUTO_AD(pIBlk)                                             \    SROM_SHORT( IBLK_EXT3_RESET_STR(pIBlk) + IBLK_EXT3_RESET_LEN(pIBlk) + 2)#define IBLK_EXT3_FD_MAP(pIBlk)                                              \    SROM_SHORT( IBLK_EXT3_RESET_STR(pIBlk) + IBLK_EXT3_RESET_LEN(pIBlk) + 4)#define IBLK_EXT3_TTM_MAP(pIBlk)                                             \    SROM_SHORT( IBLK_EXT3_RESET_STR(pIBlk) + IBLK_EXT3_RESET_LEN(pIBlk) + 6)#define IBLK_EXT3_MII_CI(pIBlk)                                             \    SROM_SHORT( IBLK_EXT3_RESET_STR(pIBlk) + IBLK_EXT3_RESET_LEN(pIBlk) + 8) #define IBLK_EXT4_MCODE(pIBlk)		(UCHAR) (*(pIBlk + 2) & 0x3F)#define	IBLK_EXT4_GPC(pIBlk)		SROM_SHORT(pIBlk + 3 ) #define	IBLK_EXT4_GPD(pIBlk)		SROM_SHORT(pIBlk + 5 ) #define	IBLK_EXT4_CMD(pIBlk)		SROM_SHORT(pIBlk + 7 ) #define	IBLK_EXT4_CMD_PS		0x0001#define	IBLK_EXT4_CMD_TTM		0x0010#define	IBLK_EXT4_CMD_PCS		0x0020#define	IBLK_EXT4_CMD_SCR		0x0040#define IBLK_EXT5_RESET_LEN(pIBlk)	(UCHAR) *(pIBlk+2)/* Serial ROM Compact Info Block, command field */#define COMPACT_CMD_ACT_INV	0x8000       /* Active Invalid */#define	COMPACT_CMD_MED_DEF	0x4000       /* Default Media */#define	COMPACT_CMD_POLARITY	0x0080       /* Media bit polarity */#define COMPACT_CMD_SCR		0x0040       /* Scrambler mode */#define	COMPACT_CMD_PCS		0x0030       /* PCS Function */#define	COMPACT_CMD_MED_SENSE	0x000E       /* Media Sense */#define	COMPACT_CMD_PS		0x0001       /* Port Select *//* Serial ROM EXT1 Info Block, valid media types */#define EXT1_MEDIA_100BT4	0x0200#define EXT1_MEDIA_100BTX_FD	0x0100#define EXT1_MEDIA_100BTX	0x0080#define EXT1_MEDIA_10BT_FD	0x0040#define EXT1_MEDIA_10BT		0x0020#define	EXT1_MEDIA_CAP_MSK	0x03E0typedef struct free_buf {    void *	pClBuf;			     /* pointer cluster buffer */} FREE_BUF;typedef volatile struct _pool {    PNIC_RD			desc;    void			*bufferp;    volatile struct _pool	*next;}BPOOL;/* The pnic169End driver control structure */typedef struct pnic169_drv_ctrl {    END_OBJ		endObj;              /* base class   */    int			flags;               /* driver flags */    int			unit;                /* unit number */    ULONG		devAdrs;             /* IO base address */    int			ivec;                /* interrupt vector */    int			ilevel;              /* interrupt level */    char *		memBase;             /* descriptor mempool base addr */    ULONG		memSize;             /* descriptor mempool size */    ULONG		pciMemBase;          /* memory base on PCI adr space */    ULONG		usrFlags;	         /* user configuration flags */    int			offset;		         /* offset for unalignment pb */    int			link_is_up;    int			rx_packets_lost_to_no_clusters;    int			RxInts;    int			TxInts;        int			numRds;              /* RD ring size */    int			rxIndex;             /* index into RD ring */    PNIC_RD *	rxRing;              /* RD ring */    int			numTds;              /* TD ring size */    int			txIndex;             /* index into TD ring */    int			txDiIndex;           /* disposal index into TD ring */    PNIC_TD *		txRing;          /* TD ring */    UINT8		mediaCount;          /* Number of PHY devices [RW] */    UINT8		mediaDefault;        /* Default PHY device [RW] */    UINT8		mediaCurrent;        /* Current PHY device [RW] */    UINT8		gprModeVal;          /* Mode bits for GP register [RW]*/    BOOL		rxHandling;	     /* handling received packets */    BOOL		txCleaning;	     /* cleaning transmit queue */    CACHE_FUNCS cacheFuncs;      /* cache function pointers */    BOOL		txBlocked;	     /* variable for blocking */    FREE_BUF	freeBuf[128];	 /* Array of free arguments */    CL_POOL_ID	clPoolId;	     /* cluster pool pointer */    BPOOL		*RxFree;    BPOOL		*RxHead;    BPOOL		*RxTail;    BPOOL		RxWrappers[NUM_RDS_DEF + 2];    volatile int	RxBufCount;} PNIC169_DRV_CTRL;IMPORT FUNCPTR	_func_pnic169MediaSelect;#define DRV_NAME		"pnic"#define DRV_NAME_LEN            4#define EADDR_LEN		6#define ETH_CRC_LEN		4#define PNIC_BUFSIZ		(16 + ETHERMTU + ENET_HDR_REAL_SIZ + EADDR_LEN)/* DRV_CTRL flags */#define PNIC_MEMOWN		  0x0001	/* TDs and RDs allocated by driver */#define PNIC_TX_KICKSTART 0x0002	/* No transmit poll */#define PNIC_POLLING	  0x0004	/* Poll mode, io mode */#define PNIC_PROMISC	  0x0008	/* Promiscuous, rx mode */#define PNIC_MCAST		  0x0010	/* Multicast, rx mode */#define PNIC_BSP_EADRS	  0x0020    /* Use BSP routine to get ether addr *//* * User options * * These options may be set in the userFlags field of the pnic169End driver * load string. The driver, at initialization, will set up apt registers to * reflect the selected options. */#define	PNIC_USR_BAR_RX	0x00001000	/* CSR0: Rx has priority over Tx */#define PNIC_USR_BE	0x00000001	    /* CSR0: Big Endian */#define	PNIC_USR_TAP_02	0x00000002	/* CSR0: Tx poll every 200 usec */#define	PNIC_USR_TAP_08	0x00000004	/* CSR0: Tx poll every 800 usec */#define	PNIC_USR_TAP_16	0x00000006	/* CSR0: Tx poll every 1.6 msec */#define PNIC_USR_TAP_012	0x00000008  /* CSR0: Tx poll every 12.8 usec */#define PNIC_USR_TAP_025	0x0000000A  /* CSR0: Tx poll every 25.6 usec */#define PNIC_USR_TAP_051	0x0000000C  /* CSR0: Tx poll every 51.2 usec */#define PNIC_USR_TAP_102	0x0000000E  /* CSR0: Tx poll every 102.4 usec */#define PNIC_USR_TAP_MSK 0x0000000E#define PNIC_USR_TAP_SHF	16#define	PNIC_USR_CAL_08	0x00000010	/* CSR0: Cache adrs aligned  8 lwords */#define	PNIC_USR_CAL_16	0x00000020	/* CSR0: Cache adrs aligned 16 lwords */#define	PNIC_USR_CAL_32	0x00000030	/* CSR0: Cache adrs aligned 32 lwords */#define	PNIC_USR_CAL_MSK	0x00000030#define PNIC_USR_CAL_SHF	10    #define	PNIC_USR_PBL_01	0x00000040	/* CSR0: DMA burst len  1 lword */#define	PNIC_USR_PBL_02	0x00000080	/* CSR0: DMA burst len  2 lwords */#define	PNIC_USR_PBL_04	0x00000100	/* CSR0: DMA burst len  4 lwords */#define	PNIC_USR_PBL_08	0x00000200	/* CSR0: DMA burst len  8 lwords */#define	PNIC_USR_PBL_16	0x00000400	/* CSR0: DMA burst len 16 lwords */#define	PNIC_USR_PBL_32	0x00000800	/* CSR0: DMA burst len 32 lwords */#define	PNIC_USR_PBL_MSK	0x00000FC0#define PNIC_USR_PBL_SHF	2#define	PNIC_USR_RML	0x00002000	    /* CSR0: PCI memory-read-multiple */#define	PNIC_USR_XEA	0x00004000      /* Use sysPinc169EnetAddrGet() */#define	PNIC_USR_SF	    0x00008000	    /* Enable store&forward CSR6:21 */#define PNIC_USR_THR_072 0x00000000  /* Use TxTheshold 72/128 bytes */#define	PNIC_USR_THR_096 0x00010000  /* Use TxTheshold 96/256 bytes */#define	PNIC_USR_THR_128 0x00020000  /* Use TxTheshold 128/512 bytes */#define	PNIC_USR_THR_160 0x00030000  /* Use TxTheshold 160/1024 bytes */#define PNIC_USR_THR_MSK 0x00030000#define PNIC_USR_THR_SHF	2#define PNIC_USR_SB	0x00040000      /* Enable backoff counter CSR6:5 */#define PNIC_USR_PB	0x00080000	    /* Enable pass bad frame  CSR6:3 */#define PNIC_USR_SC	0x00100000	    /* Enable spl capture effect CSR6:31 */#define PNIC_USR_CA	0x00200000	    /* Enable capture effect CSR6:17 */#define	PNIC_USR_VER_MSK	0xC0000000	/* PNIC version mask */#define	PNIC_USR_CSR6_MSK                                                \    (CSR6_169_PS | CSR6_169_PCS | CSR6_169_SCR | CSR6_169_TTM | CSR6_FD)/* Device specific network configuration defined in configNet.h */IMPORT M_CL_CONFIG	pnic169MBlkConfig;  /* mblk config description */IMPORT CL_DESC		pnic169lDescTbl[]; /* cluster pool config table */IMPORT int		    pnic169lDescTblEnt;IMPORT FUNCPTR  _func_pnic169MediaSelect;/* target-specfic media routine */IMPORT VOIDFUNCPTR  _func_pnic169IntAck; /* target-specfic int. ack. routine */#ifdef __cplusplus}#endif#endif /* __INCpnic169Endh */