?? class.ptf.bak
字號:
direction = "output";
type = "export";
}
PORT transmitter
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT go_rx_inter
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT not_first_bit_of_inter
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT rx_inter
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT set_reset_mode
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT node_bus_off
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT error_status
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT rx_err_cnt
{
width = "9";
width_expression = "";
direction = "output";
type = "export";
}
PORT tx_err_cnt
{
width = "9";
width_expression = "";
direction = "output";
type = "export";
}
PORT transmit_status
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT receive_status
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT tx_successful
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT need_to_tx
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT overrun
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT info_empty
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT set_bus_error_irq
{
width = "1";
width_expression = "";
direction = "output";
type = "irq";
}
PORT set_arbitration_lost_irq
{
width = "1";
width_expression = "";
direction = "output";
type = "irq";
}
PORT arbitration_lost_capture
{
width = "5";
width_expression = "";
direction = "output";
type = "export";
}
PORT node_error_passive
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT node_error_active
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT rx_message_counter
{
width = "7";
width_expression = "";
direction = "output";
type = "export";
}
PORT tx
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT tx_next
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT bus_off_on
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT go_overload_frame
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT go_error_frame
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT go_tx
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
PORT send_ack
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
}
}
}
}
USER_INTERFACE
{
USER_LABELS
{
name = "can_bsp";
technology = "imported components";
}
}
CB_GENERATOR
{
top_module_name = "can_bsp";
emit_system_h = "0";
HDL_FILES
{
FILE
{
filepath = "C:/altera/projects/CAN/can_bsp.v";
use_in_simulation = "1";
use_in_synthesis = "1";
}
}
}
COMPONENT_BUILDER
{
HDL_PARAMETERS
{
# generated by cbDocument.CBDocument.getParameterContainer:348
# used only by Component Editor
HDL_PARAMETER tp
{
parameter_name = "Tp";
type = "integer";
default_value = "1";
editable = "1";
tooltip = "";
}
}
}
}
}
}
FILE can_btl.v
{
file_mod = "Wed Oct 27 11:51:38 PDT 2004";
quartus_map_start = "Tue Feb 22 12:02:14 PST 2005";
quartus_map_finished = "Tue Feb 22 12:02:15 PST 2005";
#found 1 valid modules
WRAPPER can_btl
{
CLASS can_btl
{
MODULE_DEFAULTS
{
class = "can_btl";
class_version = "1.0";
SYSTEM_BUILDER_INFO
{
Instantiate_In_System_Module = "1";
}
SLAVE avalon_slave_0
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
Address_Width = "0";
Address_Alignment = "dynamic";
Data_Width = "8";
Has_Base_Address = "0";
Has_IRQ = "0";
}
PORT_WIRING
{
PORT clk
{
width = "1";
width_expression = "";
direction = "input";
type = "clk";
}
PORT rst
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
}
PORT rx
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
}
PORT tx
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
}
PORT baud_r_presc
{
width = "6";
width_expression = "";
direction = "input";
type = "export";
}
PORT sync_jump_width
{
width = "2";
width_expression = "";
direction = "input";
type = "export";
}
PORT time_segment1
{
width = "4";
width_expression = "";
direction = "input";
type = "export";
}
PORT time_segment2
{
width = "3";
width_expression = "";
direction = "input";
type = "export";
}
PORT triple_sampling
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
}
PORT rx_idle
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
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