#define	VM_PAGE_SIZE		PAGE_SIZE_4MB	/* 4MB page */
#endif	/* FALSE */

#undef	VM_STATE_MASK_FOR_ALL
#undef	VM_STATE_FOR_IO
#undef	VM_STATE_FOR_MEM_OS
#undef	VM_STATE_FOR_MEM_APPLICATION
#undef	VM_STATE_FOR_PCI
#define VM_STATE_MASK_FOR_ALL \
	VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | \
	VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_WBACK | VM_STATE_MASK_GLOBAL
#define VM_STATE_FOR_IO \
	VM_STATE_VALID | VM_STATE_WRITABLE | \
	VM_STATE_CACHEABLE_NOT | VM_STATE_WBACK_NOT | VM_STATE_GLOBAL_NOT
#define VM_STATE_FOR_MEM_OS \
	VM_STATE_VALID | VM_STATE_WRITABLE | \
	VM_STATE_CACHEABLE | VM_STATE_WBACK | VM_STATE_GLOBAL_NOT
#define VM_STATE_FOR_MEM_APPLICATION \
	VM_STATE_VALID | VM_STATE_WRITABLE | \
	VM_STATE_CACHEABLE | VM_STATE_WBACK | VM_STATE_GLOBAL_NOT
#define VM_STATE_FOR_PCI \
	VM_STATE_VALID | VM_STATE_WRITABLE | \
	VM_STATE_CACHEABLE_NOT | VM_STATE_WBACK_NOT | VM_STATE_GLOBAL_NOT

#endif	/* INCLUDE_MMU_PENTIUMPRO */
#endif	/* (CPU_VARIANT == PENTIUM) */


#define IO_ADRS_ELC	0x240
#define INT_LVL_ELC	0x0b
#define MEM_ADRS_ELC	0xc8000
#define MEM_SIZE_ELC	0x4000
#define CONFIG_ELC	0	/* 0=EEPROM 1=RJ45+AUI 2=RJ45+BNC */

#define IO_ADRS_ULTRA	0x240
#define INT_LVL_ULTRA	0x0b
#define MEM_ADRS_ULTRA	0xc8000
#define MEM_SIZE_ULTRA	0x4000
#define CONFIG_ULTRA	0	/* 0=EEPROM 1=RJ45+AUI 2=RJ45+BNC */

#define IO_ADRS_EEX	0x240
#define INT_LVL_EEX	0x0b
#define NTFDS_EEX	0x00
#define CONFIG_EEX	0	/* 0=EEPROM  1=AUI  2=BNC  3=RJ45 */
				/* Auto-detect is not supported, so choose */
				/* the right one you're going to use */

#define IO_ADRS_ELT	0x240
#define INT_LVL_ELT	0x0b
#define NRF_ELT		0x00
#define CONFIG_ELT	0	/* 0=EEPROM 1=AUI  2=BNC  3=RJ45 */

#define IO_ADRS_ENE	0x300
#define INT_LVL_ENE	0x05
				/* Hardware jumper is used to set */
				/* RJ45(Twisted Pair) AUI(Thick) BNC(Thin) */

#define IO_ADRS_ESMC	0x300
#define INT_LVL_ESMC	0x0b
#define CONFIG_ESMC	0	/* 0=EEPROM 1=AUI  2=BNC 3=RJ45 */
#define RX_MODE_ESMC	0	/* 0=interrupt level 1=task level */

#ifdef	INCLUDE_EEX32
#define INCLUDE_EI		/* include 82596 driver */
#define INT_LVL_EI	0x0b
#define EI_SYSBUS	0x44	/* 82596 SYSBUS value */
#define EI_POOL_ADRS	NONE	/* memory allocated from system memory */
#endif	/* INCLUDE_EEX32 */

#define FEI_POOL_ADRS	NONE	/* allocate pool space */

#ifdef  INCLUDE_SLIP
#define SLIP_TTY	1	/* serial line IP channel COM2 */
#define SLIP_BAUDRATE	19200	/* baudrate 19200 */
#endif  /* INCLUDE_SLIP */

/* vectors for PIC(i8259a) and APIC */

#ifdef	SYMMETRIC_IO_MODE

/*
 * Vector number could be any number in between 0x20 to 0xff.
 * Interrupt priority is implied by its vector number, according to
 * the following relationship: 
 *   priority = vectorNo / 16
 * The lowest priority is 1 and 15 is the highest.  To avoid losing
 * interrupts, software should allocate no more than 2 interrupt
 * vectors per priority.  Here is an example to get the vectorNo.
 *   vectorNo(IRQn) = (0xe0 - (n * 8))
 */
#define	NUMBER_OF_IRQS		24
#undef	PIT0_INT_LVL
#define	PIT0_INT_LVL		0x2	/* interrupt level */
#define	INT_NUM_IRQ0		0xe0	/* vector number for IRQ0 */
#define INT_VEC_GET(irq)	(INT_NUM_IRQ0 - (irq * 8))
#define SPURIOUS_INT_VEC	0xff	/* local interrupt */
#define TIMER_INT_VEC		0xf0	/* local interrupt */
#define ERROR_INT_VEC		0xef	/* local interrupt */
#define PIT0_INT_VEC		(INT_VEC_GET (PIT0_INT_LVL))
#define	COM1_INT_VEC		(INT_VEC_GET (COM1_INT_LVL))
#define	COM2_INT_VEC		(INT_VEC_GET (COM2_INT_LVL))
#define RTC_INT_VEC		(INT_VEC_GET (RTC_INT_LVL))
#define FD_INT_VEC		(INT_VEC_GET (FD_INT_LVL))
#define ATA0_INT_VEC 		(INT_VEC_GET (ATA0_INT_LVL))
#define ATA1_INT_VEC		(INT_VEC_GET (ATA1_INT_LVL))
#define PCIC_INT_VEC		(INT_VEC_GET (PCIC_INT_LVL))
#define TCIC_INT_VEC		(INT_VEC_GET (TCIC_INT_LVL))
#define ELT0_INT_VEC		(INT_VEC_GET (ELT0_INT_LVL))
#define ELT1_INT_VEC		(INT_VEC_GET (ELT1_INT_LVL))
#define LPT_INT_VEC		(INT_VEC_GET (LPT_INT_LVL))
#define FEI0_INT_VEC		(INT_VEC_GET (FEI0_INT_LVL))
#define FEI1_INT_VEC		(INT_VEC_GET (FEI1_INT_LVL))
#define FEI2_INT_VEC		(INT_VEC_GET (FEI2_INT_LVL))
#define FEI3_INT_VEC		(INT_VEC_GET (FEI3_INT_LVL))
#define KBD_INT_VEC		(INT_VEC_GET (KBD_INT_LVL))
#define INT_VEC_ELC		(INT_VEC_GET (INT_LVL_ELC))
#define INT_VEC_ULTRA		(INT_VEC_GET (INT_LVL_ULTRA))
#define INT_VEC_EEX		(INT_VEC_GET (INT_LVL_EEX))
#define INT_VEC_ELT		(INT_VEC_GET (INT_LVL_ELT))
#define INT_VEC_ENE		(INT_VEC_GET (INT_LVL_ENE))
#define INT_VEC_ESMC		(INT_VEC_GET (INT_LVL_ESMC))
#define INT_VEC_EI		(INT_VEC_GET (INT_LVL_EI))

#else	/* SYMMETRIC_IO_MODE */

/* 
 * Vector number is not flexable as APIC and obtained by:
 *   vectorNo(IRQn) = vectorNo(IRQ0) + n
 */
#define	NUMBER_OF_IRQS		16
#define INT_NUM_IRQ0		0x20	/* vector number for IRQ0 */
#define INT_VEC_GET(irq)	(INT_NUM_IRQ0 + irq)
#define SPURIOUS_INT_VEC	0xff	/* local interrupt */
#define TIMER_INT_VEC		0xf0	/* local interrupt */
#define ERROR_INT_VEC		0xef	/* local interrupt */
#define PIT0_INT_VEC		(INT_VEC_GET (PIT0_INT_LVL))
#define	COM1_INT_VEC		(INT_VEC_GET (COM1_INT_LVL))
#define	COM2_INT_VEC		(INT_VEC_GET (COM2_INT_LVL))
#define RTC_INT_VEC		(INT_VEC_GET (RTC_INT_LVL))
#define FD_INT_VEC		(INT_VEC_GET (FD_INT_LVL))
#define ATA0_INT_VEC 		(INT_VEC_GET (ATA0_INT_LVL))
#define ATA1_INT_VEC		(INT_VEC_GET (ATA1_INT_LVL))
#define PCIC_INT_VEC		(INT_VEC_GET (PCIC_INT_LVL))
#define TCIC_INT_VEC		(INT_VEC_GET (TCIC_INT_LVL))
#define ELT0_INT_VEC		(INT_VEC_GET (ELT0_INT_LVL))
#define ELT1_INT_VEC		(INT_VEC_GET (ELT1_INT_LVL))
#define LPT_INT_VEC		(INT_VEC_GET (LPT_INT_LVL))
#define FEI0_INT_VEC		(INT_VEC_GET (FEI0_INT_LVL))
#define FEI1_INT_VEC		(INT_VEC_GET (FEI1_INT_LVL))
#define FEI2_INT_VEC		(INT_VEC_GET (FEI2_INT_LVL))
#define FEI3_INT_VEC		(INT_VEC_GET (FEI3_INT_LVL))
#define KBD_INT_VEC		(INT_VEC_GET (KBD_INT_LVL))
#define INT_VEC_ELC		(INT_VEC_GET (INT_LVL_ELC))
#define INT_VEC_ULTRA		(INT_VEC_GET (INT_LVL_ULTRA))
#define INT_VEC_EEX		(INT_VEC_GET (INT_LVL_EEX))
#define INT_VEC_ELT		(INT_VEC_GET (INT_LVL_ELT))
#define INT_VEC_ENE		(INT_VEC_GET (INT_LVL_ENE))
#define INT_VEC_ESMC		(INT_VEC_GET (INT_LVL_ESMC))
#define INT_VEC_EI		(INT_VEC_GET (INT_LVL_EI))

#endif	/* SYMMETRIC_IO_MODE */


/* miscellaneous definitions */

#define NV_RAM_SIZE     NONE            /* no NVRAM */

/* 
 * SYS_CLK_RATE_MAX depends upon a CPU power and a work load of an application.
 * The value was chosen in order to pass the internal test suit,
 * but it could go up to PIT_CLOCK.
 */
#define SYS_CLK_RATE_MIN  19            /* minimum system clock rate */
#define SYS_CLK_RATE_MAX  (PIT_CLOCK/256) /* maximum system clock rate */
#define AUX_CLK_RATE_MIN  2             /* minimum auxiliary clock rate */
#define AUX_CLK_RATE_MAX  8192          /* maximum auxiliary clock rate */


/* pc console definitions  */

#if	TRUE
#define INCLUDE_PC_CONSOLE 		/*  KBD and VGA are included */
#endif  /* TRUE/FALSE */

#ifdef INCLUDE_PC_CONSOLE

#define	PC_CONSOLE		0	/* console number */
#define	N_VIRTUAL_CONSOLES	2	/* shell / application */

#endif /* INCLUDE_PC_CONSOLE */

#undef	NUM_TTY
#define NUM_TTY			(N_UART_CHANNELS)

/* define a type of keyboard. The default is 101 KEY for PS/2 */

#define PC_KBD_TYPE		PC_PS2_101_KBD
#if	FALSE
#define PC_KBD_TYPE		PC_XT_83_KBD
#endif	/* FALSE */


/* memory addresses */

/* User reserved memory.  See sysMemTop(). */

#define	USER_RESERVED_MEM	0

/*
 * Local-to-Bus memory address constants:
 * the local memory address always appears at 0 locally;
 * it is not dual ported.
 */

#define LOCAL_MEM_LOCAL_ADRS	0x00000000	/* fixed */
#define LOCAL_MEM_BUS_ADRS	0x00000000	/* fixed */
#define LOCAL_MEM_SIZE		0x00800000	/* 8MB w lower mem */

/*
 * Auto-sizing of memory is supported when this option is defined, in which
 * case LOCAL_MEM_SIZE is ignored.  See sysyPhysMemTop().
 */

#undef	LOCAL_MEM_AUTOSIZE

/*
 * The following parameters are defined here and in the Makefile.
 * The must be kept synchronized; effectively config.h depends on Makefile.
 * Any changes made here must be made in the Makefile and vice versa.
 */

#ifdef	BOOTCODE_IN_RAM
#define ROM_BASE_ADRS		0x00008000	/* base address of ROM */
#define ROM_TEXT_ADRS		(ROM_BASE_ADRS)	/* booting from A: or C: */
#define ROM_SIZE		0x00090000	/* size of ROM */
#else
#define ROM_BASE_ADRS		0xfff20000	/* base address of ROM */
#define ROM_TEXT_ADRS		(ROM_BASE_ADRS)	/* booting from EPROM */
#define ROM_SIZE		0x0007fe00	/* size of ROM */
#endif

#define RAM_LOW_ADRS		0x00108000	/* VxWorks image entry point */
#define RAM_HIGH_ADRS		0x00008000	/* Boot image entry point */

#define INCLUDE_WDB

#define WDB_MODE        WDB_MODE_DUAL	/* WDB_MODE_[DUAL|TASK|EXTERN] */

/* communication path configuration */

#ifndef WDB_COMM_TYPE
#define WDB_COMM_TYPE WDB_COMM_NETWORK	/* default path is the network */
#endif

#undef WDB_COMM_TYPE
#define WDB_COMM_TYPE WDB_SERIAL

#undef WDB_TTY_CHANNEL
#define WDB_TTY_CHANNEL		0	/* default Sio SERIAL channel */


#undef WDB_TTY_DEV_NAME

#undef WDB_TTY_BAUD
#define WDB_TTY_BAUD		9600	/* default baud rate */




/*
 * The macro INCLUDE_ADD_BOOTMEM enables sysHwInit2,sysLib.c code which 
 * adds some upper memory (>1MB) to the bootrom image memory pool.  
 * It should not be defined for x86 systems with limited memory,< 4MB.  
 * The default value for ADDED_BOOTMEM_SIZE is 0x00200000 (2MB).
 * This value may be increased, but one must ensure that the pool 
 * does not overlap with the downloaded vxWorks image.  If there is 
 * an overlap, then loading the vxWorks runtime image will corrupt 
 * the added memory pool.   The calculation is:
 * (RAM_LOW_ADRS + vxWorks image size) < (memTopPhys - ADDED_BOOTMEM_SIZE)
 * Where: RAM_LOW_ADRS == 0x00108000 and memTopPhys is from sysLib.c.
 * This corrects SPR#21338.
 */
 
#undef INCLUDE_ADD_BOOTMEM  /* Add upper memory to low memory bootrom */
#define ADDED_BOOTMEM_SIZE   0x00200000   /* 2MB */

#endif	/* INCconfigh */

#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif