?? fet440_ta_05.s43
字號:
;******************************************************************************
; MSP-FET430F440 Demo - Timer_A, Toggle P5.1, CCR0 Up Mode ISR, 32kHz ACLK
;
; Description: Toggle P5.1 using software and the TA_0 ISR. Timer_A is
; configured for up mode, thus the timer overflows when TAR counts to CCR0.
; In this example, CCR0 is loaded with 1000-1.
; ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz
; //* An external watch crystal between XIN & XOUT is required for ACLK *//
;
; MSP430F449
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P5.1|-->LED
;
; M. Buccini
; Texas Instruments Inc.
; Feb 2005
; Built with IAR Embedded Workbench Version: 3.21A
;******************************************************************************
#include <msp430x44x.h>
;------------------------------------------------------------------------------
ORG 0E000h ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0A00h,SP ; Initialize stack pointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupFLL bis.b #XCAP14PF,&FLL_CTL0 ; Configure load caps
SetupP5 bis.b #002h,&P5DIR ; P5.1 output
SetupC0 mov.w #CCIE,&CCTL0 ; CCR0 interrupt enabled
mov.w #1000-1,&CCR0 ; CCR0 counts to 1000
SetupTA mov.w #TASSEL_1+MC_1,&TACTL ; ACLK, upmode
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3, interrupts enabled
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
TA0_ISR; Toggle P5.1
;------------------------------------------------------------------------------
xor.b #002h,&P5OUT ; Toggle P5.1
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFECh ; Timer_A0 Vector
DW TA0_ISR ;
END
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