AT91C_PMC_PCER.access=memorymapped
AT91C_PMC_PCER.address=0xFFFFFC10
AT91C_PMC_PCER.width=32
AT91C_PMC_PCER.byteEndian=little
AT91C_PMC_PCER.type=enum
AT91C_PMC_PCER.enum.0.name=*** Write only ***
AT91C_PMC_PCER.enum.1.name=Error
AT91C_PMC_PCSR.name="AT91C_PMC_PCSR"
AT91C_PMC_PCSR.description="Peripheral Clock Status Register"
AT91C_PMC_PCSR.helpkey="Peripheral Clock Status Register"
AT91C_PMC_PCSR.access=memorymapped
AT91C_PMC_PCSR.address=0xFFFFFC18
AT91C_PMC_PCSR.width=32
AT91C_PMC_PCSR.byteEndian=little
AT91C_PMC_PCSR.permission.write=none
AT91C_PMC_PLLR.name="AT91C_PMC_PLLR"
AT91C_PMC_PLLR.description="PLL Register"
AT91C_PMC_PLLR.helpkey="PLL Register"
AT91C_PMC_PLLR.access=memorymapped
AT91C_PMC_PLLR.address=0xFFFFFC2C
AT91C_PMC_PLLR.width=32
AT91C_PMC_PLLR.byteEndian=little
AT91C_PMC_MCFR.name="AT91C_PMC_MCFR"
AT91C_PMC_MCFR.description="Main Clock  Frequency Register"
AT91C_PMC_MCFR.helpkey="Main Clock  Frequency Register"
AT91C_PMC_MCFR.access=memorymapped
AT91C_PMC_MCFR.address=0xFFFFFC24
AT91C_PMC_MCFR.width=32
AT91C_PMC_MCFR.byteEndian=little
AT91C_PMC_MCFR.permission.write=none
AT91C_PMC_PCKR.name="AT91C_PMC_PCKR"
AT91C_PMC_PCKR.description="Programmable Clock Register"
AT91C_PMC_PCKR.helpkey="Programmable Clock Register"
AT91C_PMC_PCKR.access=memorymapped
AT91C_PMC_PCKR.address=0xFFFFFC40
AT91C_PMC_PCKR.width=32
AT91C_PMC_PCKR.byteEndian=little
# ========== Register definition for RSTC peripheral ========== 
AT91C_RSTC_RSR.name="AT91C_RSTC_RSR"
AT91C_RSTC_RSR.description="Reset Status Register"
AT91C_RSTC_RSR.helpkey="Reset Status Register"
AT91C_RSTC_RSR.access=memorymapped
AT91C_RSTC_RSR.address=0xFFFFFD04
AT91C_RSTC_RSR.width=32
AT91C_RSTC_RSR.byteEndian=little
AT91C_RSTC_RSR.permission.write=none
AT91C_RSTC_RMR.name="AT91C_RSTC_RMR"
AT91C_RSTC_RMR.description="Reset Mode Register"
AT91C_RSTC_RMR.helpkey="Reset Mode Register"
AT91C_RSTC_RMR.access=memorymapped
AT91C_RSTC_RMR.address=0xFFFFFD08
AT91C_RSTC_RMR.width=32
AT91C_RSTC_RMR.byteEndian=little
AT91C_RSTC_RCR.name="AT91C_RSTC_RCR"
AT91C_RSTC_RCR.description="Reset Control Register"
AT91C_RSTC_RCR.helpkey="Reset Control Register"
AT91C_RSTC_RCR.access=memorymapped
AT91C_RSTC_RCR.address=0xFFFFFD00
AT91C_RSTC_RCR.width=32
AT91C_RSTC_RCR.byteEndian=little
AT91C_RSTC_RCR.type=enum
AT91C_RSTC_RCR.enum.0.name=*** Write only ***
AT91C_RSTC_RCR.enum.1.name=Error
# ========== Register definition for RTTC peripheral ========== 
AT91C_RTTC_RTSR.name="AT91C_RTTC_RTSR"
AT91C_RTTC_RTSR.description="Real-time Status Register"
AT91C_RTTC_RTSR.helpkey="Real-time Status Register"
AT91C_RTTC_RTSR.access=memorymapped
AT91C_RTTC_RTSR.address=0xFFFFFD2C
AT91C_RTTC_RTSR.width=32
AT91C_RTTC_RTSR.byteEndian=little
AT91C_RTTC_RTSR.permission.write=none
AT91C_RTTC_RTAR.name="AT91C_RTTC_RTAR"
AT91C_RTTC_RTAR.description="Real-time Alarm Register"
AT91C_RTTC_RTAR.helpkey="Real-time Alarm Register"
AT91C_RTTC_RTAR.access=memorymapped
AT91C_RTTC_RTAR.address=0xFFFFFD24
AT91C_RTTC_RTAR.width=32
AT91C_RTTC_RTAR.byteEndian=little
AT91C_RTTC_RTVR.name="AT91C_RTTC_RTVR"
AT91C_RTTC_RTVR.description="Real-time Value Register"
AT91C_RTTC_RTVR.helpkey="Real-time Value Register"
AT91C_RTTC_RTVR.access=memorymapped
AT91C_RTTC_RTVR.address=0xFFFFFD28
AT91C_RTTC_RTVR.width=32
AT91C_RTTC_RTVR.byteEndian=little
AT91C_RTTC_RTVR.permission.write=none
AT91C_RTTC_RTMR.name="AT91C_RTTC_RTMR"
AT91C_RTTC_RTMR.description="Real-time Mode Register"
AT91C_RTTC_RTMR.helpkey="Real-time Mode Register"
AT91C_RTTC_RTMR.access=memorymapped
AT91C_RTTC_RTMR.address=0xFFFFFD20
AT91C_RTTC_RTMR.width=32
AT91C_RTTC_RTMR.byteEndian=little
# ========== Register definition for PITC peripheral ========== 
AT91C_PITC_PIIR.name="AT91C_PITC_PIIR"
AT91C_PITC_PIIR.description="Period Interval Image Register"
AT91C_PITC_PIIR.helpkey="Period Interval Image Register"
AT91C_PITC_PIIR.access=memorymapped
AT91C_PITC_PIIR.address=0xFFFFFD3C
AT91C_PITC_PIIR.width=32
AT91C_PITC_PIIR.byteEndian=little
AT91C_PITC_PIIR.permission.write=none
AT91C_PITC_PISR.name="AT91C_PITC_PISR"
AT91C_PITC_PISR.description="Period Interval Status Register"
AT91C_PITC_PISR.helpkey="Period Interval Status Register"
AT91C_PITC_PISR.access=memorymapped
AT91C_PITC_PISR.address=0xFFFFFD34
AT91C_PITC_PISR.width=32
AT91C_PITC_PISR.byteEndian=little
AT91C_PITC_PISR.permission.write=none
AT91C_PITC_PIVR.name="AT91C_PITC_PIVR"
AT91C_PITC_PIVR.description="Period Interval Value Register"
AT91C_PITC_PIVR.helpkey="Period Interval Value Register"
AT91C_PITC_PIVR.access=memorymapped
AT91C_PITC_PIVR.address=0xFFFFFD38
AT91C_PITC_PIVR.width=32
AT91C_PITC_PIVR.byteEndian=little
AT91C_PITC_PIVR.permission.write=none
AT91C_PITC_PIMR.name="AT91C_PITC_PIMR"
AT91C_PITC_PIMR.description="Period Interval Mode Register"
AT91C_PITC_PIMR.helpkey="Period Interval Mode Register"
AT91C_PITC_PIMR.access=memorymapped
AT91C_PITC_PIMR.address=0xFFFFFD30
AT91C_PITC_PIMR.width=32
AT91C_PITC_PIMR.byteEndian=little
# ========== Register definition for WDTC peripheral ========== 
AT91C_WDTC_WDMR.name="AT91C_WDTC_WDMR"
AT91C_WDTC_WDMR.description="Watchdog Mode Register"
AT91C_WDTC_WDMR.helpkey="Watchdog Mode Register"
AT91C_WDTC_WDMR.access=memorymapped
AT91C_WDTC_WDMR.address=0xFFFFFD44
AT91C_WDTC_WDMR.width=32
AT91C_WDTC_WDMR.byteEndian=little
AT91C_WDTC_WDSR.name="AT91C_WDTC_WDSR"
AT91C_WDTC_WDSR.description="Watchdog Status Register"
AT91C_WDTC_WDSR.helpkey="Watchdog Status Register"
AT91C_WDTC_WDSR.access=memorymapped
AT91C_WDTC_WDSR.address=0xFFFFFD48
AT91C_WDTC_WDSR.width=32
AT91C_WDTC_WDSR.byteEndian=little
AT91C_WDTC_WDSR.permission.write=none
AT91C_WDTC_WDCR.name="AT91C_WDTC_WDCR"
AT91C_WDTC_WDCR.description="Watchdog Control Register"
AT91C_WDTC_WDCR.helpkey="Watchdog Control Register"
AT91C_WDTC_WDCR.access=memorymapped
AT91C_WDTC_WDCR.address=0xFFFFFD40
AT91C_WDTC_WDCR.width=32
AT91C_WDTC_WDCR.byteEndian=little
AT91C_WDTC_WDCR.type=enum
AT91C_WDTC_WDCR.enum.0.name=*** Write only ***
AT91C_WDTC_WDCR.enum.1.name=Error
# ========== Register definition for VREG peripheral ========== 
AT91C_VREG_MR.name="AT91C_VREG_MR"
AT91C_VREG_MR.description="Voltage Regulator Mode Register"
AT91C_VREG_MR.helpkey="Voltage Regulator Mode Register"
AT91C_VREG_MR.access=memorymapped
AT91C_VREG_MR.address=0xFFFFFD60
AT91C_VREG_MR.width=32
AT91C_VREG_MR.byteEndian=little
# ========== Register definition for MC peripheral ========== 
AT91C_MC_PUER.name="AT91C_MC_PUER"
AT91C_MC_PUER.description="MC Protection Unit Enable Register"
AT91C_MC_PUER.helpkey="MC Protection Unit Enable Register"
AT91C_MC_PUER.access=memorymapped
AT91C_MC_PUER.address=0xFFFFFF54
AT91C_MC_PUER.width=32
AT91C_MC_PUER.byteEndian=little
AT91C_MC_ASR.name="AT91C_MC_ASR"
AT91C_MC_ASR.description="MC Abort Status Register"
AT91C_MC_ASR.helpkey="MC Abort Status Register"
AT91C_MC_ASR.access=memorymapped
AT91C_MC_ASR.address=0xFFFFFF04
AT91C_MC_ASR.width=32
AT91C_MC_ASR.byteEndian=little
AT91C_MC_ASR.permission.write=none
AT91C_MC_PUP.name="AT91C_MC_PUP"
AT91C_MC_PUP.description="MC Protection Unit Peripherals"
AT91C_MC_PUP.helpkey="MC Protection Unit Peripherals"
AT91C_MC_PUP.access=memorymapped
AT91C_MC_PUP.address=0xFFFFFF50
AT91C_MC_PUP.width=32
AT91C_MC_PUP.byteEndian=little
AT91C_MC_PUIA.name="AT91C_MC_PUIA"
AT91C_MC_PUIA.description="MC Protection Unit Area"
AT91C_MC_PUIA.helpkey="MC Protection Unit Area"
AT91C_MC_PUIA.access=memorymapped
AT91C_MC_PUIA.address=0xFFFFFF10
AT91C_MC_PUIA.width=32
AT91C_MC_PUIA.byteEndian=little
AT91C_MC_AASR.name="AT91C_MC_AASR"
AT91C_MC_AASR.description="MC Abort Address Status Register"
AT91C_MC_AASR.helpkey="MC Abort Address Status Register"
AT91C_MC_AASR.access=memorymapped
AT91C_MC_AASR.address=0xFFFFFF08
AT91C_MC_AASR.width=32
AT91C_MC_AASR.byteEndian=little
AT91C_MC_AASR.permission.write=none
AT91C_MC_RCR.name="AT91C_MC_RCR"
AT91C_MC_RCR.description="MC Remap Control Register"
AT91C_MC_RCR.helpkey="MC Remap Control Register"
AT91C_MC_RCR.access=memorymapped
AT91C_MC_RCR.address=0xFFFFFF00
AT91C_MC_RCR.width=32
AT91C_MC_RCR.byteEndian=little
AT91C_MC_RCR.type=enum
AT91C_MC_RCR.enum.0.name=*** Write only ***
AT91C_MC_RCR.enum.1.name=Error
# ========== Register definition for EFC0 peripheral ========== 
AT91C_EFC0_VR.name="AT91C_EFC0_VR"
AT91C_EFC0_VR.description="MC Flash Version Register"
AT91C_EFC0_VR.helpkey="MC Flash Version Register"
AT91C_EFC0_VR.access=memorymapped
AT91C_EFC0_VR.address=0xFFFFFF6C
AT91C_EFC0_VR.width=32
AT91C_EFC0_VR.byteEndian=little
AT91C_EFC0_VR.permission.write=none
AT91C_EFC0_FCR.name="AT91C_EFC0_FCR"
AT91C_EFC0_FCR.description="MC Flash Command Register"
AT91C_EFC0_FCR.helpkey="MC Flash Command Register"
AT91C_EFC0_FCR.access=memorymapped
AT91C_EFC0_FCR.address=0xFFFFFF64
AT91C_EFC0_FCR.width=32
AT91C_EFC0_FCR.byteEndian=little
AT91C_EFC0_FCR.type=enum
AT91C_EFC0_FCR.enum.0.name=*** Write only ***
AT91C_EFC0_FCR.enum.1.name=Error
AT91C_EFC0_FSR.name="AT91C_EFC0_FSR"
AT91C_EFC0_FSR.description="MC Flash Status Register"
AT91C_EFC0_FSR.helpkey="MC Flash Status Register"
AT91C_EFC0_FSR.access=memorymapped
AT91C_EFC0_FSR.address=0xFFFFFF68
AT91C_EFC0_FSR.width=32
AT91C_EFC0_FSR.byteEndian=little
AT91C_EFC0_FSR.permission.write=none
AT91C_EFC0_FMR.name="AT91C_EFC0_FMR"
AT91C_EFC0_FMR.description="MC Flash Mode Register"
AT91C_EFC0_FMR.helpkey="MC Flash Mode Register"
AT91C_EFC0_FMR.access=memorymapped
AT91C_EFC0_FMR.address=0xFFFFFF60
AT91C_EFC0_FMR.width=32
AT91C_EFC0_FMR.byteEndian=little
# ========== Register definition for EFC1 peripheral ========== 
AT91C_EFC1_VR.name="AT91C_EFC1_VR"
AT91C_EFC1_VR.description="MC Flash Version Register"
AT91C_EFC1_VR.helpkey="MC Flash Version Register"
AT91C_EFC1_VR.access=memorymapped
AT91C_EFC1_VR.address=0xFFFFFF7C
AT91C_EFC1_VR.width=32
AT91C_EFC1_VR.byteEndian=little
AT91C_EFC1_VR.permission.write=none
AT91C_EFC1_FCR.name="AT91C_EFC1_FCR"
AT91C_EFC1_FCR.description="MC Flash Command Register"
AT91C_EFC1_FCR.helpkey="MC Flash Command Register"
AT91C_EFC1_FCR.access=memorymapped
AT91C_EFC1_FCR.address=0xFFFFFF74
AT91C_EFC1_FCR.width=32
AT91C_EFC1_FCR.byteEndian=little
AT91C_EFC1_FCR.type=enum
AT91C_EFC1_FCR.enum.0.name=*** Write only ***
AT91C_EFC1_FCR.enum.1.name=Error
AT91C_EFC1_FSR.name="AT91C_EFC1_FSR"
AT91C_EFC1_FSR.description="MC Flash Status Register"
AT91C_EFC1_FSR.helpkey="MC Flash Status Register"
AT91C_EFC1_FSR.access=memorymapped
AT91C_EFC1_FSR.address=0xFFFFFF78
AT91C_EFC1_FSR.width=32
AT91C_EFC1_FSR.byteEndian=little
AT91C_EFC1_FSR.permission.write=none
AT91C_EFC1_FMR.name="AT91C_EFC1_FMR"
AT91C_EFC1_FMR.description="MC Flash Mode Register"
AT91C_EFC1_FMR.helpkey="MC Flash Mode Register"
AT91C_EFC1_FMR.access=memorymapped
AT91C_EFC1_FMR.address=0xFFFFFF70
AT91C_EFC1_FMR.width=32
AT91C_EFC1_FMR.byteEndian=little
# ========== Register definition for PDC_SPI peripheral ========== 
AT91C_SPI_PTCR.name="AT91C_SPI_PTCR"
AT91C_SPI_PTCR.description="PDC Transfer Control Register"
AT91C_SPI_PTCR.helpkey="PDC Transfer Control Register"
AT91C_SPI_PTCR.access=memorymapped
AT91C_SPI_PTCR.address=0xFFFE0120
AT91C_SPI_PTCR.width=32
AT91C_SPI_PTCR.byteEndian=little
AT91C_SPI_PTCR.type=enum
AT91C_SPI_PTCR.enum.0.name=*** Write only ***
AT91C_SPI_PTCR.enum.1.name=Error
AT91C_SPI_TNPR.name="AT91C_SPI_TNPR"
AT91C_SPI_TNPR.description="Transmit Next Pointer Register"
AT91C_SPI_TNPR.helpkey="Transmit Next Pointer Register"
AT91C_SPI_TNPR.access=memorymapped
AT91C_SPI_TNPR.address=0xFFFE0118
AT91C_SPI_TNPR.width=32
AT91C_SPI_TNPR.byteEndian=little
AT91C_SPI_RNPR.name="AT91C_SPI_RNPR"
AT91C_SPI_RNPR.description="Receive Next Pointer Register"
AT91C_SPI_RNPR.helpkey="Receive Next Pointer Register"
AT91C_SPI_RNPR.access=memorymapped
AT91C_SPI_RNPR.address=0xFFFE0110
AT91C_SPI_RNPR.width=32
AT91C_SPI_RNPR.byteEndian=little
AT91C_SPI_TPR.name="AT91C_SPI_TPR"
AT91C_SPI_TPR.description="Transmit Pointer Register"
AT91C_SPI_TPR.helpkey="Transmit Pointer Register"
AT91C_SPI_TPR.access=memorymapped
AT91C_SPI_TPR.address=0xFFFE0108
AT91C_SPI_TPR.width=32
AT91C_SPI_TPR.byteEndian=little
AT91C_SPI_RPR.name="AT91C_SPI_RPR"
AT91C_SPI_RPR.description="Receive Pointer Register"
AT91C_SPI_RPR.helpkey="Receive Pointer Register"
AT91C_SPI_RPR.access=memorymapped
AT91C_SPI_RPR.address=0xFFFE0100
AT91C_SPI_RPR.width=32
AT91C_SPI_RPR.byteEndian=little
AT91C_SPI_PTSR.name="AT91C_SPI_PTSR"
AT91C_SPI_PTSR.description="PDC Transfer Status Register"
AT91C_SPI_PTSR.helpkey="PDC Transfer Status Register"
AT91C_SPI_PTSR.access=memorymapped
AT91C_SPI_PTSR.address=0xFFFE0124
AT91C_SPI_PTSR.width=32
AT91C_SPI_PTSR.byteEndian=little
AT91C_SPI_PTSR.permission.write=none
AT91C_SPI_TNCR.name="AT91C_SPI_TNCR"
AT91C_SPI_TNCR.descript