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<h1>Watchdog Timer Controller Interface Peripheral</h1>
<null><a name="WDTC"></a><b>WDTC</b> <i><font size="-1">(<a href="AT91SAM7SE512_h.html#AT91S_WDTC">AT91S_WDTC</a>)</font></i><b> 0xFFFFFD40 </b><i><font size="-1">(<a href="AT91SAM7SE512_h.html#AT91C_BASE_WDTC">AT91C_BASE_WDTC</a>)</font></i>
<table border=1 cellpadding=3 cellspacing=0><null><th bgcolor="#FFFFCC"><font size="-1">Periph ID <a href="#AIC">AIC</a></font></th><th bgcolor="#FFFFCC"><font size="-1">Symbol</font></th><th bgcolor="#FFFFCC"><font size="-1">Description</font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b>1</b> </font></td><td><font size="-1"><i><font size="-1">(<a href="AT91SAM7SE512_h.html#AT91C_ID_SYS">AT91C_ID_SYS</a>)</font></i></font></td><td><font size="-1">System Peripheral</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_WDTC_CfgPMC">AT91F_WDTC_CfgPMC</a></b></font></td><td><font size="-1">Enable Peripheral clock in PMC for WDTC</font></td></tr>
</null></table><br><br></null><a name="WDTC"></a><h2>WDTC Software API <i><font size="-1">(<a href="AT91SAM7SE512_h.html#AT91S_WDTC">AT91S_WDTC</a>)</font></i></h2>
<a name="WDTC"></a><null><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Offset</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Field</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x0</b></font></td><td><font size="-1"><a href="AT91SAM7SE512_WDTC.html#WDTC_WDCR">WDTC_WDCR</a></font></td><td><font size="-1">Watchdog Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x4</b></font></td><td><font size="-1"><a href="AT91SAM7SE512_WDTC.html#WDTC_WDMR">WDTC_WDMR</a></font></td><td><font size="-1">Watchdog Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x8</b></font></td><td><font size="-1"><a href="AT91SAM7SE512_WDTC.html#WDTC_WDSR">WDTC_WDSR</a></font></td><td><font size="-1">Watchdog Status Register</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_WDTSGettatus">AT91F_WDTSGettatus</a></b></font></td><td><font size="-1">Get Watchdog Status</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_WDTGetPeriod">AT91F_WDTGetPeriod</a></b></font></td><td><font size="-1">Translate ms into Watchdog Compatible value</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_WDTSetMode">AT91F_WDTSetMode</a></b></font></td><td><font size="-1">Set Watchdog Mode Register</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_WDTRestart">AT91F_WDTRestart</a></b></font></td><td><font size="-1">Restart Watchdog</font></td></tr>
</null></table></null><h2>WDTC Register Description</h2>
<null><a name="WDTC_WDCR"></a><h4><a href="#WDTC">WDTC</a>: <i><a href="AT91SAM7SE512_h.html#AT91_REG">AT91_REG</a></i> WDTC_WDCR <i>Watchdog Control Register</i></h4><ul><null><font size="-2"><li><b>WDTC</b> <i><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDCR">AT91C_WDTC_WDCR</a></i> 0xFFFFFD40</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="WDTC_WDRSTT"></a><b>WDTC_WDRSTT</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDRSTT">AT91C_WDTC_WDRSTT</a></font></td><td><b>Watchdog Restart</b><br>0 = No effect.<br>1 = Reload the Watchdog.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">31..24</td><td align="CENTER"><a name="WDTC_KEY"></a><b>WDTC_KEY</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_KEY">AT91C_WDTC_KEY</a></font></td><td><b>Watchdog KEY Password</b><br>Should be written at value 0xA5.</td></tr>
</null></table>
<a name="WDTC_WDMR"></a><h4><a href="#WDTC">WDTC</a>: <i><a href="AT91SAM7SE512_h.html#AT91_REG">AT91_REG</a></i> WDTC_WDMR <i>Watchdog Mode Register</i></h4><ul><null><font size="-2"><li><b>WDTC</b> <i><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDMR">AT91C_WDTC_WDMR</a></i> 0xFFFFFD44</font></null></ul><br>Write Once !!!<table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">11..0</td><td align="CENTER"><a name="WDTC_WDV"></a><b>WDTC_WDV</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDV">AT91C_WDTC_WDV</a></font></td><td><b>Watchdog Timer Restart</b><br>Defines the value loaded in the 16-bit counter. Programming 0 disables the wathchdog.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">12</td><td align="CENTER"><a name="WDTC_WDFIEN"></a><b>WDTC_WDFIEN</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDFIEN">AT91C_WDTC_WDFIEN</a></font></td><td><b>Watchdog Fault Interrupt Enable</b><br>0 = A Watchdog fault (underflow or error) has no effect on SCIRQ.<br>1 = A Watchdog fault (underflow or error) asserts SCIRQ.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">13</td><td align="CENTER"><a name="WDTC_WDRSTEN"></a><b>WDTC_WDRSTEN</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDRSTEN">AT91C_WDTC_WDRSTEN</a></font></td><td><b>Watchdog Reset Enable</b><br>0 = A watchdog overflow has no effect on the resets.<br>1 = A watchdog overflow trigs a watchdog reset (general reset).</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">14</td><td align="CENTER"><a name="WDTC_WDRPROC"></a><b>WDTC_WDRPROC</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDRPROC">AT91C_WDTC_WDRPROC</a></font></td><td><b>Watchdog Timer Restart</b><br>0 = A watchdog overflow has no effect on the processor reset.<br>1 = A watchdog overflow trigs a processor reset.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">15</td><td align="CENTER"><a name="WDTC_WDDIS"></a><b>WDTC_WDDIS</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDDIS">AT91C_WDTC_WDDIS</a></font></td><td><b>Watchdog Disable</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">27..16</td><td align="CENTER"><a name="WDTC_WDD"></a><b>WDTC_WDD</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDD">AT91C_WDTC_WDD</a></font></td><td><b>Watchdog Delta Value</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">28</td><td align="CENTER"><a name="WDTC_WDDBGHLT"></a><b>WDTC_WDDBGHLT</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDDBGHLT">AT91C_WDTC_WDDBGHLT</a></font></td><td><b>Watchdog Debug Halt</b><br>0 = The watchdog runs when the processor is in debug state.<br>1 = The watchdog stops when the processor is in debug state.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">29</td><td align="CENTER"><a name="WDTC_WDIDLEHLT"></a><b>WDTC_WDIDLEHLT</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDIDLEHLT">AT91C_WDTC_WDIDLEHLT</a></font></td><td><b>Watchdog Idle Halt</b><br>0 = The watchdog runs when the system is in idle mode.<br>1 = The watchdog stops when the system is in idle mode.</td></tr>
</null></table>
<a name="WDTC_WDSR"></a><h4><a href="#WDTC">WDTC</a>: <i><a href="AT91SAM7SE512_h.html#AT91_REG">AT91_REG</a></i> WDTC_WDSR <i>Watchdog Status Register</i></h4><ul><null><font size="-2"><li><b>WDTC</b> <i><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDSR">AT91C_WDTC_WDSR</a></i> 0xFFFFFD48</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="WDTC_WDUNF"></a><b>WDTC_WDUNF</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDUNF">AT91C_WDTC_WDUNF</a></font></td><td><b>Watchdog Underflow</b><br>0 = No Watchdog Underflow occured since the last read of WDTC_WDSR.<br>1 = At least one Watchdog Underflow occured since the last read of WDTC_WDSR.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="WDTC_WDERR"></a><b>WDTC_WDERR</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_WDTC_WDERR">AT91C_WDTC_WDERR</a></font></td><td><b>Watchdog Error</b><br>0 = No watchdog error occured since the last read of WDTC_WDSR.<br>1 = At least one watchdog error occured since the last read of WDTC_WDSR.</td></tr>
</null></table>
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