<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x110</b></font></td><td><font size="-1">SPI_RNPR (<a href="AT91SAM7SE512_PDC.html#PDC_RNPR">PDC_RNPR</a>)</font></td><td><font size="-1">Receive Next Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x114</b></font></td><td><font size="-1">SPI_RNCR (<a href="AT91SAM7SE512_PDC.html#PDC_RNCR">PDC_RNCR</a>)</font></td><td><font size="-1">Receive Next Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x118</b></font></td><td><font size="-1">SPI_TNPR (<a href="AT91SAM7SE512_PDC.html#PDC_TNPR">PDC_TNPR</a>)</font></td><td><font size="-1">Transmit Next Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x11C</b></font></td><td><font size="-1">SPI_TNCR (<a href="AT91SAM7SE512_PDC.html#PDC_TNCR">PDC_TNCR</a>)</font></td><td><font size="-1">Transmit Next Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x120</b></font></td><td><font size="-1">SPI_PTCR (<a href="AT91SAM7SE512_PDC.html#PDC_PTCR">PDC_PTCR</a>)</font></td><td><font size="-1">PDC Transfer Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x124</b></font></td><td><font size="-1">SPI_PTSR (<a href="AT91SAM7SE512_PDC.html#PDC_PTSR">PDC_PTSR</a>)</font></td><td><font size="-1">PDC Transfer Status Register</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_Reset">AT91F_SPI_Reset</a></b></font></td><td><font size="-1">Reset the SPI controller</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_Close">AT91F_SPI_Close</a></b></font></td><td><font size="-1">Close SPI: disable IT disable transfert, close PDC</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_Disable">AT91F_SPI_Disable</a></b></font></td><td><font size="-1">Disable the SPI controller</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_Enable">AT91F_SPI_Enable</a></b></font></td><td><font size="-1">Enable the SPI controller</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_SendFrame">AT91F_SPI_SendFrame</a></b></font></td><td><font size="-1">Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is bSPIy</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_CfgMode">AT91F_SPI_CfgMode</a></b></font></td><td><font size="-1">Enable the SPI controller</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_GetChar">AT91F_SPI_GetChar</a></b></font></td><td><font size="-1">Receive a character,does not check if a character is available</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_PutChar">AT91F_SPI_PutChar</a></b></font></td><td><font size="-1">Send a character,does not check if ready to send</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_DisableIt">AT91F_SPI_DisableIt</a></b></font></td><td><font size="-1">Disable SPI interrupt</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_GetInterruptMaskStatus">AT91F_SPI_GetInterruptMaskStatus</a></b></font></td><td><font size="-1">Return SPI Interrupt Mask Status</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_IsInterruptMasked">AT91F_SPI_IsInterruptMasked</a></b></font></td><td><font size="-1">Test if SPI Interrupt is Masked </font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_ReceiveFrame">AT91F_SPI_ReceiveFrame</a></b></font></td><td><font size="-1">Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_CfgCs">AT91F_SPI_CfgCs</a></b></font></td><td><font size="-1">Configure SPI chip select register</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_EnableIt">AT91F_SPI_EnableIt</a></b></font></td><td><font size="-1">Enable SPI interrupt</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7SE512_h.html#AT91F_SPI_CfgPCS">AT91F_SPI_CfgPCS</a></b></font></td><td><font size="-1">Switch to the correct PCS of SPI Mode Register : Fixed Peripheral Selected</font></td></tr>
</null></table></null><h2>SPI Register Description</h2>
<null><a name="SPI_CR"></a><h4><a href="#SPI">SPI</a>: <i><a href="AT91SAM7SE512_h.html#AT91_REG">AT91_REG</a></i> SPI_CR  <i>Control Register</i></h4><ul><null><font size="-2"><li><b>SPI</b> <i><a href="AT91SAM7SE512_h.html#AT91C_SPI_CR">AT91C_SPI_CR</a></i> 0xFFFE0000</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="SPI_SPIEN"></a><b>SPI_SPIEN</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_SPIEN">AT91C_SPI_SPIEN</a></font></td><td><b>SPI Enable</b><br>0 = No effect.<br>1 = Enables the SPI to transfer and receive data.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="SPI_SPIDIS"></a><b>SPI_SPIDIS</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_SPIDIS">AT91C_SPI_SPIDIS</a></font></td><td><b>SPI Disable</b><br>0 = No effect.<br>1 = Disables the SPI.<br>All pins are set in input mode and no data is received or transmitted.<br>If a transfer is in progress, the transfer is finished before the SPI is disabled.<br>If both SPIEN and SPIDIS are equal to one when the control register is written, the SPI is disabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="SPI_SWRST"></a><b>SPI_SWRST</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_SWRST">AT91C_SPI_SWRST</a></font></td><td><b>SPI Software reset</b><br>0 = No effect.<br>1 = Resets the SPI.<br>A software triggered hardware reset of the SPI interface is performed.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">24</td><td align="CENTER"><a name="SPI_LASTXFER"></a><b>SPI_LASTXFER</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_LASTXFER">AT91C_SPI_LASTXFER</a></font></td><td><b>SPI Last Transfer</b><br>0 = No effect.<br>1 = Deassert the NPCS after all transfers occured. Useful when CSAAT is set.</td></tr>
</null></table>
<a name="SPI_MR"></a><h4><a href="#SPI">SPI</a>: <i><a href="AT91SAM7SE512_h.html#AT91_REG">AT91_REG</a></i> SPI_MR  <i>Mode Register</i></h4><ul><null><font size="-2"><li><b>SPI</b> <i><a href="AT91SAM7SE512_h.html#AT91C_SPI_MR">AT91C_SPI_MR</a></i> 0xFFFE0004</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="SPI_MSTR"></a><b>SPI_MSTR</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_MSTR">AT91C_SPI_MSTR</a></font></td><td><b>Master/Slave Mode</b><br>0 = SPI is in Slave mode.<br>1 = SPI is in Master mode.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="SPI_PS"></a><b>SPI_PS</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_PS">AT91C_SPI_PS</a></font></td><td><b>Peripheral Select</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="SPI_PS_FIXED"></a><b>SPI_PS_FIXED</b><font size="-1"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_PS_FIXED">AT91C_SPI_PS_FIXED</a></font></td><td><br>Fixed Peripheral Select</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="SPI_PS_VARIABLE"></a><b>SPI_PS_VARIABLE</b><font size="-1"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_PS_VARIABLE">AT91C_SPI_PS_VARIABLE</a></font></td><td><br>Variable Peripheral Select</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="SPI_PCSDEC"></a><b>SPI_PCSDEC</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_PCSDEC">AT91C_SPI_PCSDEC</a></font></td><td><b>Chip Select Decode</b><br>0 = The chip selects are directly connected to a peripheral device.<br>1 = The four chip select lines are connected to a 4- to 16-bit decoder.<br>When PCSDEC equals one, up to 16 Chip Select signals can be generated with the four lines using an external 4- to 16- bit decoder.<br>The Chip Select Registers define the characteristics of the 16 chip selects according to the following rules:<br>	SPI_CSR0 defines peripheral chip select signals 0 to 3.<br>	SPI_CSR1 defines peripheral chip select signals 4 to 7.<br>	SPI_CSR2 defines peripheral chip select signals 8 to 11.<br>	SPI_CSR3 defines peripheral chip select signals 12 to 15 (1) .<br>Note: 1. The 16th state corresponds to a state in which all chip selects are inactive. This allows a different clock configuration to be defined by each chip select register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3</td><td align="CENTER"><a name="SPI_FDIV"></a><b>SPI_FDIV</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_FDIV">AT91C_SPI_FDIV</a></font></td><td><b>Clock Selection</b><br>0 = SPI Master Clock equals MCK<br>1 = SPI Master Clock equals MCK/N. Product dependancy</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">4</td><td align="CENTER"><a name="SPI_MODFDIS"></a><b>SPI_MODFDIS</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_MODFDIS">AT91C_SPI_MODFDIS</a></font></td><td><b>Mode Fault Detection</b><br>0 = Mode Fault Detection is enabled<br>1 = Mode Fault Detection is disabled</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="SPI_LLB"></a><b>SPI_LLB</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_LLB">AT91C_SPI_LLB</a></font></td><td><b>Clock Selection</b><br>0 = Local loopback path disabled<br>1 = Local loopback path enabled<br>LLB controls the local loopback on the data serializer for testing in master mode only.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">19..16</td><td align="CENTER"><a name="SPI_PCS"></a><b>SPI_PCS</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_PCS">AT91C_SPI_PCS</a></font></td><td><b>Peripheral Chip Select</b><br>This field is only used if Fixed Peripheral Select is active (PS = 0).<br>	If PCSDEC=0:<br>		PCS = xxx0 NPCS[3:0] = 1110<br>		PCS = xx01 NPCS[3:0] = 1101<br>		PCS = x011 NPCS[3:0] = 1011<br>		PCS = 0111 NPCS[3:0] = 0111<br>		PCS = 1111 forbidden (no peripheral is selected)<br>		(x = don&#146;t care)<br>	If PCSDEC=1: NPCS[3:0] output signals = PCS</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">31..24</td><td align="CENTER"><a name="SPI_DLYBCS"></a><b>SPI_DLYBCS</b><font size="-2"><br><a href="AT91SAM7SE512_h.html#AT91C_SPI_DLYBCS">AT91C_SPI_DLYBCS</a></font></td><td><b>Delay Between Chip Selects</b><br>This field defines the delay from NPCS inactive to the activation of another NPCS. The DLYBCS time guarantees non-overlapping chip selects and solves bus contentions in case of peripherals having long data float times.<br>If DLYBCS is less than or equal to six, six SPI Master Clock periods will be inserted by default.<br>Otherwise, the following equation determines the delay:<br>	Delay_ Between_Chip_Selects = DLYBCS / MCK</td></tr>