endfunction

8.3 Some Hardware Implementation Comments

   The iSCSI spec specifies that the most significant 32 bits of the
   data be complemented prior to performing the CRC computation.  For
   most implementations of the CRC algorithm, such as the ones described
   here, which perform simultaneous multiplication by x^32 and division
   by the CRC polynomial, this is equivalent to initializing the CRC
   register to ones regardless of the CRC polynomial.  For other
   implementations, in particular one that only performs division by the
   CRC polynomial (and for which the prescribed multiplication by x^32
   is performed externally) initializing the CRC register to ones does
   not have the same effect as complementing the most significant 32
   bits of the message.  With such implementations, for the CRC32c
   polynomial, initializing the CRC register to 0x2a26f826 has the same
   effect as complementing the most significant 32 bits of the data.
   See reference [Tuikov&Cavanna] for more details.

8.4 Fast Hardware Implementation References

   Fast hardware implementations start from a canonic scheme (as the one
   presented in 7.2) and optimize it based on different criteria.  Two
   classic papers on this subject are [Albertengo1990] and [Glaise1997].
   A more modern (and systematic) approach can be found in [Shie2001]
   and [Sprachman2001].

9. Summary and Conclusions

   The following table is a summary of the error detection capabilities
   of the different codes analyzed.  In the table, d is the minimal
   distance at block length block (in bits), i/byte - software
   instructions/byte, Table size (if table lookup needed), T-look number
   of lookups/byte, Pudb - Pud burst and Puds - Pud sporadic:





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   +-----------------------------------------------------------+
   | Code      |d| Block |i/Byte|Tsize|T-look| Pudb   | Puds   |
   +-----------------------------------------------------------+
   | Fletcher32|3| 2^19  | 2    |  -  | -    | 10^-37 | 10^-36 |
   +-----------------------------------------------------------+
   | Adler32   |3| 2^19  | 3    |  -  | -    | 10^-36 | 10^-35 |
   +-----------------------------------------------------------+
   | IEEE-802  |3| 2^16  | 2.75 | 2^18| 0.5/b| 10^-41 | 10^-40 |
   +-----------------------------------------------------------+
   | CRC32C    |3| 2^31-1| 2.75 | 2^18| 0.5/b| 10^-41 | 10^-40 |
   +-----------------------------------------------------------+

   The probabilities for undetected errors in the above table are
   computed assuming uniformly distributed data.  For real data - that
   can be biased - [Stone98], checksums behave substantially worse than
   CRCs.

   Considering the protection level it offers, the lack of sensitivity
   for biased data and the large block it can protect, we think that
   CRC32C is a good choice as a basic error detection mechanism for
   iSCSI.

   Please observe also that burst errors characterized by a fixed
   average time will have a higher impact on error detection capability
   as the speed of the channels (machines and networks) increases.  The
   only way to keep the Pud within bounds for the long-term is to reduce
   the BER by using better coding of lower levels of the channel.

10. Security Considerations

   These codes detect unintentional changes to data such as those caused
   by noise. In an environment where an attacker can change the data, it
   can also change the error-detection code to match the new data.
   Therefore, the error-detection codes overviewed here do not provide
   protection against attacks.  Indeed, these codes are not intended for
   security purposes; they are meant to be used within some application,
   and the application's threat model and security design control the
   security considerations for the use of the CRC.

11. References and Bibliography

   [Albertengo1990] G. Albertengo, R. Sisto, "Parallel CRC Generation
                    IEEE Micro", Vol. 10, No. 5, October 1990, pp. 63-
                    71.

   [Arazi]          B Arazi, "A commonsense Approach to the Theory of
                    Error Correcting codes".




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   [Baicheva]       T Baicheva, S Dodunekov and P Kazakov, "Undetected
                    error probability performance of cyclic redundancy-
                    check codes of 16-bit redundancy", IEEE Proceedings
                    on Communications, 147:253-256, October 2000.

   [Black]          "Fast CRC32 in Software"  by Richard Black, 1994, at
                    www.cl.cam.ac.uk/Research/SRG/bluebook/21/crc/crc.
                    html.

   [Castagnoli93]   Guy Castagnoli, Stefan Braeuer and Martin Herrman
                    "Optimization of Cyclic Redundancy-Check Codes with
                    24 and 32 Parity Bits", IEEE Transact. on
                    Communications, Vol. 41, No. 6, June 1993.

   [braun01]        Florian Braun and Marcel Waldvogel, "Fast
                    Incremental CRC Updates for IP over ATM Networks",
                    IEEE, High Performance Switching and Routing, 2001,
                    pp. 48-52.

   [FITS]           "NASA FITS documents" at http://heasarc.gsfc.nasa.
                    gov/docs/heasarc/ofwg/docs/general/checksum/node26.
                    html.

   [Fujiwara89]     Toru Fujiwara, Tadao Kasami, and Shu Lin, "Error
                    detecting capabilities of the shortened hamming
                    codes adopted forerror detection in IEEE standard
                    802.3", IEEE Transactions on Communications, COM-
                    37:986989, September 1989.

   [Glaise1997]     Glaise, R. J., "A two-step computation of cyclic
                    redundancy code CRC-32 for ATM networks", IBM
                    Journal of Research and Development, Volume 41,
                    Number 6, 1997.

   [ieee1364]       IEEE Standard Hardware Description Language Based on
                    the Verilog Hardware Description Language, IEEE
                    Standard 1364-1995, December 1995.

   [LinCostello]    S. Lin and D.J. Costello, Jr., "Error Control
                    Coding: Fundamentals and Applications", Englewood
                    Cliffs, NJ: Prentice Hall, 1983.

   [Peterson]       W Wesley Peterson & E J Weldon - Error Correcting
                    Codes - First Edition 1961/Second Edition 1972.







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   [RFC2026]        Bradner, S., "The Internet Standards Process --
                    Revision 3", BCP 9, RFC 2026, October 1996.

   [Ritter]         Ritter, T. 1986. The Great CRC Mystery. Dr. Dobb's
                    Journal of Software Tools. February. 11(2): 26-34,
                    76-83.

   [Polynomials]    "Information on Primitive and Irreducible
                    Polynomials" at http://www.theory.csc.uvic.ca/~cos/
                    inf/neck/PolyInfo.html.

   [RFC1146]        Zweig, J. and C. Partridge, "TCP Alternate Checksum
                    Options", RFC 1146, March 1990.

   [RFC1950]        Deutsch, P. and J. Gailly, "ZLIB Compressed Data
                    Format Specification version 3.3", RFC 1950, May
                    1996.

   [Shie2001]       Ming-Der Shieh, et. al, "A Systematic Approach for
                    Parallel CRC Computations", Journal of Information
                    Science and Engineering, Vol.17 No.3, pp.445-461.

   [Sprachman2001]  Michael Sprachman, "Automatic Generation of Parallel
                    CRC Circuits", IEEE Design & Test May-June 2001.

   [Stone98]        J. Stone et. al., "Performance of Checksums and
                    CRC's over Real Data", IEEE/ACM Transactions on
                    Networking, Vol. 6, No. 5, October 1998.

   [Williams]       Ross Williams - A PAINLESS GUIDE TO CRC ERROR
                    DETECTION ALGORITHMS widely available on the net -
                    (e.g., ftp.adelaide.edu.au/pub/rocksoft/crc_v3.txt)

   [Wolf82]         J.K. Wolf, Arnold Michelson and Allen Levesque, "On
                    the probability of undetected error for linear block
                    codes", IEEE Transactions on Communications, COM-30:
                    317-324, 1982.

   [Wolf88]         J.K. Wolf, R.D. Blackeney, "An Exact Evaluation of
                    the Probability of Undetected Error for Certain
                    Shortened Binary CRC Codes", Proc. MILCOM - IEEE
                    1988.

   [Wolf94J]        J.K. Wolf and Dexter Chun, "The single burst error
                    detection performance of binary cyclic codes", IEEE
                    Transactions on Communications COM-42:11-13, January
                    1994.




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   [Wolf94O]        Dexter Chun and J.K. Wolf, "Special Hardware for
                    computing the probability of undetected error for
                    certain binary crc codes and test results", IEEE
                    Transactions on Communications, COM-42:2769-2772.

   [Tuikov&Cavanna] Luben Tuikov and Vicente Cavanna, "The iSCSI CRC32C
                    Digest and the Simultaneous Multiply and Divide
                    Algorithm", January 30, 2002. White paper
                    distributed to the IETF ips iSCSI reflector.

12. Acknowledgements

   We would like to thank Matt Wakeley for providing us with the
   motivation to co-author this paper and for helpful discussions on the
   subject matter, during his employment with Agilent.

13. Authors' Addresses

   Julian Satran
   IBM, Haifa Research Lab
   MATAM - Advanced Technology Center
   Haifa 31905, Israel
   EMail: julian_satran@il.ibm.com


   Dafna Sheinwald
   IBM, Haifa Research Lab
   MATAM - Advanced Technology Center
   Haifa 31905, Israel
   EMail: Dafna_Sheinwald@il.ibm.com


   Pat Thaler
   Agilent Technologies
   1101 Creekside Ridge Drive
   Suite 100, M/S RH21
   Roseville, CA 95661
   EMail: pat_thaler@agilent.com


   Vicente Cavanna
   Agilent Technologies
   1101 Creekside Ridge Drive
   Suite 100, M/S RH21
   Roseville, CA 95661
   EMail: vince_cavanna@agilent.com





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14.  Full Copyright Statement

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   This document and translations of it may be copied and furnished to
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Acknowledgement

   Funding for the RFC Editor function is currently provided by the
   Internet Society.



















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