?? sysctl.c
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//*****************************************************************************
//
// sysctl.c - Driver for the system controller.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. ALl rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 687 of the Stellaris Driver Library.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup sysctl_api
//! @{
//
//*****************************************************************************
#include "hw_ints.h"
#include "hw_memmap.h"
#include "hw_nvic.h"
#include "hw_sysctl.h"
#include "hw_types.h"
#include "cpu.h"
#include "debug.h"
#include "interrupt.h"
#include "sysctl.h"
//*****************************************************************************
//
// An array that maps the "peripheral set" number (which is stored in the upper
// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL DC? register that
// contains the peripheral present bit for that peripheral.
//
//*****************************************************************************
const unsigned long g_pulDCRegs[] =
{
SYSCTL_DC1,
SYSCTL_DC2,
SYSCTL_DC4,
SYSCTL_DC1
};
//*****************************************************************************
//
// An array that maps the "peripheral set" number (which is stored in the upper
// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_SRCR? register that
// controls the software reset for that peripheral.
//
//*****************************************************************************
const unsigned long g_pulSRCRRegs[] =
{
SYSCTL_SRCR0,
SYSCTL_SRCR1,
SYSCTL_SRCR2
};
//*****************************************************************************
//
// An array that maps the "peripheral set" number (which is stored in the upper
// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_RCGC? register that
// controls the run-mode enable for that peripheral.
//
//*****************************************************************************
const unsigned long g_pulRCGCRegs[] =
{
SYSCTL_RCGC0,
SYSCTL_RCGC1,
SYSCTL_RCGC2
};
//*****************************************************************************
//
// An array that maps the "peripheral set" number (which is stored in the upper
// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_SCGC? register that
// controls the sleep-mode enable for that peripheral.
//
//*****************************************************************************
const unsigned long g_pulSCGCRegs[] =
{
SYSCTL_SCGC0,
SYSCTL_SCGC1,
SYSCTL_SCGC2
};
//*****************************************************************************
//
// An array that maps the "peripheral set" number (which is stored in the upper
// nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_DCGC? register that
// controls the deep-sleep-mode enable for that peripheral.
//
//*****************************************************************************
const unsigned long g_pulDCGCRegs[] =
{
SYSCTL_DCGC0,
SYSCTL_DCGC1,
SYSCTL_DCGC2
};
//*****************************************************************************
//
// An array that maps the crystal number in RCC to a frequency.
//
//*****************************************************************************
const unsigned long g_pulXtals[] =
{
3579545,
3686400,
4000000,
4096000,
4915200,
5000000,
5120000,
6000000,
6144000,
7372800,
8000000,
8192000
};
//*****************************************************************************
//
//! Gets the size of the SRAM.
//!
//! This function determines the size of the SRAM on the Stellaris device.
//!
//! \return The total number of bytes of SRAM.
//
//*****************************************************************************
unsigned long
SysCtlSRAMSizeGet(void)
{
//
// Compute the size of the SRAM.
//
return(((HWREG(SYSCTL_DC0) & SYSCTL_DC0_SRAMSZ_MASK) >> 8) + 0x100);
}
//*****************************************************************************
//
//! Gets the size of the flash.
//!
//! This function determines the size of the flash on the Stellaris device.
//!
//! \return The total number of bytes of flash.
//
//*****************************************************************************
unsigned long
SysCtlFlashSizeGet(void)
{
//
// Compute the size of the flash.
//
return(((HWREG(SYSCTL_DC0) & SYSCTL_DC0_FLASHSZ_MASK) << 11) + 0x800);
}
//*****************************************************************************
//
//! Determines if a pin is present.
//!
//! \param ulPin is the pin in question.
//!
//! Determines if a particular pin is present in the device. The PWM, analog
//! comparators, ADC, and timers have a varying number of pins across members
//! of the Stellaris family; this will determine which are present on this
//! device.
//!
//! The \b ulPin argument must be only one of the following values:
//! \b SYSCTL_PIN_PWM0, \b SYSCTL_PIN_PWM1, \b SYSCTL_PIN_PWM2,
//! \b SYSCTL_PIN_PWM3, \b SYSCTL_PIN_PWM4, \b SYSCTL_PIN_PWM5,
//! \b SYSCTL_PIN_C0MINUS, \b SYSCTL_PIN_C0PLUS, \b SYSCTL_PIN_C0O,
//! \b SYSCTL_PIN_C1MINUS, \b SYSCTL_PIN_C1PLUS, \b SYSCTL_PIN_C1O,
//! \b SYSCTL_PIN_C2MINUS, \b SYSCTL_PIN_C2PLUS, \b SYSCTL_PIN_C2O,
//! \b SYSCTL_PIN_ADC0, \b SYSCTL_PIN_ADC1, \b SYSCTL_PIN_ADC2,
//! \b SYSCTL_PIN_ADC3, \b SYSCTL_PIN_ADC4, \b SYSCTL_PIN_ADC5,
//! \b SYSCTL_PIN_ADC6, \b SYSCTL_PIN_ADC7, \b SYSCTL_PIN_CCP0,
//! \b SYSCTL_PIN_CCP1, \b SYSCTL_PIN_CCP2, \b SYSCTL_PIN_CCP3,
//! \b SYSCTL_PIN_CCP4, \b SYSCTL_PIN_CCP5, \b SYSCTL_PIN_CCP6,
//! \b SYSCTL_PIN_CCP7, or \b SYSCTL_PIN_32KHZ.
//!
//! \return Returns \b true if the specified pin is present and \b false if it
//! is not.
//
//*****************************************************************************
tBoolean
SysCtlPinPresent(unsigned long ulPin)
{
//
// Check the arguments.
//
ASSERT((ulPin == SYSCTL_PIN_PWM0) ||
(ulPin == SYSCTL_PIN_PWM1) ||
(ulPin == SYSCTL_PIN_PWM2) ||
(ulPin == SYSCTL_PIN_PWM3) ||
(ulPin == SYSCTL_PIN_PWM4) ||
(ulPin == SYSCTL_PIN_PWM5) ||
(ulPin == SYSCTL_PIN_C0MINUS) ||
(ulPin == SYSCTL_PIN_C0PLUS) ||
(ulPin == SYSCTL_PIN_C0O) ||
(ulPin == SYSCTL_PIN_C1MINUS) ||
(ulPin == SYSCTL_PIN_C1PLUS) ||
(ulPin == SYSCTL_PIN_C1O) ||
(ulPin == SYSCTL_PIN_C2MINUS) ||
(ulPin == SYSCTL_PIN_C2PLUS) ||
(ulPin == SYSCTL_PIN_C2O) ||
(ulPin == SYSCTL_PIN_ADC0) ||
(ulPin == SYSCTL_PIN_ADC1) ||
(ulPin == SYSCTL_PIN_ADC2) ||
(ulPin == SYSCTL_PIN_ADC3) ||
(ulPin == SYSCTL_PIN_ADC4) ||
(ulPin == SYSCTL_PIN_ADC5) ||
(ulPin == SYSCTL_PIN_ADC6) ||
(ulPin == SYSCTL_PIN_ADC7) ||
(ulPin == SYSCTL_PIN_CCP0) ||
(ulPin == SYSCTL_PIN_CCP1) ||
(ulPin == SYSCTL_PIN_CCP2) ||
(ulPin == SYSCTL_PIN_CCP3) ||
(ulPin == SYSCTL_PIN_CCP4) ||
(ulPin == SYSCTL_PIN_CCP5) ||
(ulPin == SYSCTL_PIN_32KHZ))
//
// Determine if this pin is present.
//
if(HWREG(SYSCTL_DC3) & ulPin)
{
return(true);
}
else
{
return(false);
}
}
//*****************************************************************************
//
//! Determines if a peripheral is present.
//!
//! \param ulPeripheral is the peripheral in question.
//!
//! Determines if a particular peripheral is present in the device. Each
//! member of the Stellaris family has a different peripheral set; this will
//! determine which are present on this device.
//!
//! The \b ulPeripheral argument must be only one of the following values:
//! \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_WDOG,
//! \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1, \b SYSCTL_PERIPH_SSI,
//! \b SYSCTL_PERIPH_QEI, \b SYSCTL_PERIPH_I2C, \b SYSCTL_PERIPH_TIMER0,
//! \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2, \b SYSCTL_PERIPH_COMP0,
//! \b SYSCTL_PERIPH_COMP1, \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_GPIOA,
//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_MPU, \b SYSCTL_PERIPH_TEMP, or
//! \b SYSCTL_PERIPH_PLL.
//!
//! \return Returns \b true if the specified peripheral is present and \b false
//! if it is not.
//
//*****************************************************************************
tBoolean
SysCtlPeripheralPresent(unsigned long ulPeripheral)
{
//
// Check the arguments.
//
ASSERT((ulPeripheral == SYSCTL_PERIPH_PWM) ||
(ulPeripheral == SYSCTL_PERIPH_ADC) ||
(ulPeripheral == SYSCTL_PERIPH_WDOG) ||
(ulPeripheral == SYSCTL_PERIPH_UART0) ||
(ulPeripheral == SYSCTL_PERIPH_UART1) ||
(ulPeripheral == SYSCTL_PERIPH_SSI) ||
(ulPeripheral == SYSCTL_PERIPH_QEI) ||
(ulPeripheral == SYSCTL_PERIPH_I2C) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER0) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER1) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER2) ||
(ulPeripheral == SYSCTL_PERIPH_COMP0) ||
(ulPeripheral == SYSCTL_PERIPH_COMP1) ||
(ulPeripheral == SYSCTL_PERIPH_COMP2) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOA) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOB) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOC) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOD) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOE) ||
(ulPeripheral == SYSCTL_PERIPH_MPU) ||
(ulPeripheral == SYSCTL_PERIPH_TEMP) ||
(ulPeripheral == SYSCTL_PERIPH_PLL));
//
// Read the correct DC register and determine if this peripheral exists.
//
if(HWREG(g_pulDCRegs[ulPeripheral >> 28]) & ulPeripheral & 0x0fffffff)
{
return(true);
}
else
{
return(false);
}
}
//*****************************************************************************
//
//! Performs a software reset of a peripheral.
//!
//! \param ulPeripheral is the peripheral to reset.
//!
//! This function performs a software reset of the specified peripheral. An
//! individual peripheral reset signal is asserted for a brief period and then
//! deasserted, leaving the peripheral in a operating state but in its reset
//! condition.
//!
//! The \b ulPeripheral argument must be only one of the following values:
//! \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_WDOG,
//! \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1, \b SYSCTL_PERIPH_SSI,
//! \b SYSCTL_PERIPH_QEI, \b SYSCTL_PERIPH_I2C, \b SYSCTL_PERIPH_TIMER0,
//! \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2, \b SYSCTL_PERIPH_COMP0,
//! \b SYSCTL_PERIPH_COMP1, \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_GPIOA,
//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD, or
//! \b SYSCTL_PERIPH_GPIOE.
//!
//! \return None.
//
//*****************************************************************************
void
SysCtlPeripheralReset(unsigned long ulPeripheral)
{
volatile unsigned long ulDelay;
//
// Check the arguments.
//
ASSERT((ulPeripheral == SYSCTL_PERIPH_PWM) ||
(ulPeripheral == SYSCTL_PERIPH_ADC) ||
(ulPeripheral == SYSCTL_PERIPH_WDOG) ||
(ulPeripheral == SYSCTL_PERIPH_UART0) ||
(ulPeripheral == SYSCTL_PERIPH_UART1) ||
(ulPeripheral == SYSCTL_PERIPH_SSI) ||
(ulPeripheral == SYSCTL_PERIPH_QEI) ||
(ulPeripheral == SYSCTL_PERIPH_I2C) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER0) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER1) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER2) ||
(ulPeripheral == SYSCTL_PERIPH_COMP0) ||
(ulPeripheral == SYSCTL_PERIPH_COMP1) ||
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