//=============================================================================
// Filename:     introutines.c
//
// Description:  setup code for ARM interrupts
//
//============================================================================


asm("ISR: .sect \"isr\" ");

static volatile unsigned long* const 
                           mask_it_reg      = (unsigned long*)0xffff2d04;
static volatile unsigned long* const 
                           src_irq_reg      = (unsigned long*)0xffff2d08;
static volatile unsigned long* const 
                           src_fiq_reg      = (unsigned long*)0xffff2d0c;
static volatile unsigned long* const 
                           int_ctrl_reg     = (unsigned long*)0xffff2d18;

#define HIGH_PRIORITY	0x0001
#define LOW_PRIORITY	0x0002

#define NEW_IRQ_AGR     0x0001
#define NEW_FIQ_AGR 	0x0002

#define IRQ_MSK_ALL     0xFFFF

static unsigned short clock_ticks;
static void timer1_handler(void)
{
    clock_ticks++;
}

static unsigned long hw_delay_tick;
static void timer2_handler(void)
{
    hw_delay_tick--;
}

static volatile int it_source;
static void it_handler(unsigned short priority)
{
	if (priority == HIGH_PRIORITY) {
   		it_source = *src_fiq_reg;
   	}
  	else {
    	it_source = *src_irq_reg;
    }
    
  	switch (it_source) {
    case 0x0001 : break;
    case 0x0002 : 
        timer1_handler(); 
        break;
    case 0x0004 : 
        timer2_handler();
        break;
    case 0x0008 : break;
    case 0x0010 : break;
    case 0x0020 : break;
    case 0x0040 : break;
    case 0x0080 : break;
    case 0x0100 : break;
    case 0x0200 : break;
    case 0x0400 : break;
    case 0x0800 : break;
    case 0x1000 : break;
    case 0x2000 : break;
    case 0x4000 : break;
    case 0x8000 : break;
    default	 	: asm(" .long 0xDEFED0FE");
  	}
    /* re-enable interrupt on the interrupt controller */
  	if (priority == HIGH_PRIORITY) {
        *int_ctrl_reg |= NEW_FIQ_AGR;
    }
  	else {
        *int_ctrl_reg |= NEW_IRQ_AGR;
    }
}  

interrupt
void c_irq(void)
{
	it_handler(LOW_PRIORITY);
}

interrupt
void c_fiq(void)
{
	it_handler(HIGH_PRIORITY);
}

void resetinterrupts(void)
{
    // Clear all pending interrupts
    *int_ctrl_reg |= *int_ctrl_reg;  
    // Mask all interrupts (restore to reset state)
    *mask_it_reg = IRQ_MSK_ALL;     
}