.section .set
.*
.syntax
    .set option
.esyntax
.*
.descrp
The .set directive instructs the assembler to enable or disable certain
options. The assembler has the following default options:
.begpoint $compact
.point at.
.point macro,
.point move,
.point novolatile, and
.point reorder,
.endpoint
.pc
Only one option can be specified for each
.sy .set
directive:
.begbull

.bull
The
.kw at
option permits the assembler to use the
.kw $at
register for macros, but generates warnings if the source program uses
.kw $at.

.bull
When you use the
.kw noat
option and an assembler operation requires the
.kw $at
register, the assembler issues a warning message; however, the
.kw noat
option does permit source programs to use
.kw $at
without warnings being issued.

.bull
The
.kw macro
option permits the assembler to generate multiple machine instructions
from a single assembler instruction. This is the default action.

.bull
The
.kw nomacro
option causes the assembler to print a warning whenever an assembler
operation generates more than one machine language instruction. You
must select the
.kw noreorder
option before using the
.kw nomacro
option; otherwise, an error results.

.bull
The
.kw move
option cancels the effect of
.kw nomove.

.bull
The
.kw nomove
option instructs the assembler to mark each subsequent instruction so
that it cannot be moved during reorganization. The assembler can still
move instructions from below the nomove region to above the region or
vice versa. The
.kw nomove
option has part of the effect of the "volatile" C declaration; it
prevents otherwise independent loads or stores from occurring in a
different order than intended.

.bull
The
.kw reorder
option permits the assembler to reorder machine language instructions
to improve performance.

.bull
The
.kw noreorder
option prevents the assembler from reordering machine language
instructions. If a machine language instruction violates the hardware
pipeline constraints, the assembler issues a warning message.

.bull
The
.kw volatile
option instructs the assembler that subsequent load and store
instructions may not be moved in relation to each other or removed by
redundant load removal or other optimization. The
.kw volatile
option is less restrictive than
.kw noreorder;
it allows the assembler to move other instructions (that is,
instructions other than load and store instructions) without
restrictions.

.bull
The
.kw novolatile
option cancels the effect of the
.kw volatile
option.

.endbull
.edescrp
.category assembler option directive
.*
.section .s_floating
.*
.syntax
    .s_floating expression1 [, expression2] ... [, expressionN]
.esyntax
.*
.descrp
The .s_floating directive initializes memory to single precision
(32-bit) IEEE floating-point numbers. The values of the expressions
must be absolute.
.np
The operands for the .s_floating directive can optionally have the
form:
.illust begin
expressionVal [ :expressionRep]
.illust end
.np
The expressionVal is a 32-bit value. The optional expressionRep is a
non-negative expression that specifies how many times to replicate the
value of expressionVal. The expression value (expressionVal) and
repetition count (expressionRep) must be absolute.
.np
This directive automatically aligns its data and preceding labels to a
longword boundary. This feature can be disabled with the .align 0
directive.
.edescrp
.category data storage
.*
.section .short
.*
.notes non-Microsoft
.*
.section .space
.*
.syntax
    .space expression
.esyntax
.*
.descrp
The .space directive advances the location counter by the number of
bytes specified by the value of expression. The assembler fills the
space with zeros.
.edescrp
.category location control directive
.*
.section .string
.*
.notes non-Microsoft
.*
.section .struct (not supported)
.*
.section symbolic equate
.*
.syntax
    name = expression
    name = register
.esyntax
.*
.descrp
The (symbolic equate) directive takes one of the following forms:
.illust begin
name = expression
name = register
.illust end
.np
You must define name only once in the assembly, and you cannot redefine
name. The expression must be computable when you assemble the program,
and the expression must involve only operators, constants, or equated
symbols. name can be used as a constant in any later statement.
.edescrp
.category symbol declaration directives
.*
.section .text
.*
.syntax
    .text
.esyntax
.*
.descrp
The .text directive instructs the assembler to add subsequent code to
the .text section. (This is the default.)
.edescrp
.category location control directive
.*
.section .t_floating
.*
.syntax
    .t_floating expression1 [, expression2] ... [, expressionN]
.esyntax
.*
.descrp
The .t_floating directive initializes memory to double precision
(64-bit) IEEE floating-point numbers. The values of the expressions
must be absolute.
.np
The operands can optionally have the form:
.illust begin
expressionVal [ :expressionRep]
.illust end
.np
The expressionVal is a 64-bit value. The optional expressionRep is a
non-negative expression that specifies how many times to replicate the
value of expressionVal. The expression value (expressionVal) and
repetition count (expressionRep) must be absolute.
.np
This directive automatically aligns its data and any preceding labels
to a quadword boundary. This feature can be disabled with the .align 0
directive.
.edescrp
.category data storage
.*
.section .tls$ (not supported)
.*
.section unop
.*
.syntax
    unop
.esyntax
.*
.descrp
Universal No Operation has no effect on the machine state.
.edescrp
.category instruction
.*
.section .value
.*
.notes non-Microsoft
.*
.section .version
.*
.notes non-Microsoft
.*
.section .verstamp (not supported)
.*
.section .weakref (not supported)
.*
.section .word
.*
.syntax
    .word expression1 [, expression2] ... [, expressionN]
.esyntax
.*
.descrp
The .word directive truncates the values of the expressions specified
in the comma-separated list to 16-bit values and assembles the values
in successive locations. The values of the expressions must be
absolute. The operands in the .word directive can optionally have the
form:
.illust begin
expressionVal [ :expressionRep]
.illust end
.np
The expressionVal is a 16-bit value. The optional expressionRep is a
non-negative expression that specifies how many times to replicate the
value of expressionVal. The expression value (expressionVal) and
repetition count (expressionRep) must be absolute.
.np
This directive automatically aligns its data and preceding labels on a
word boundary. This feature can be disabled with the .align 0
directive.
.edescrp
.category data storage
.*
.section .xdata
.*
.notes non-Microsoft
.*
.section .ydata
.*
.notes non-Microsoft
.*
.*
.endlevel
.*
.section Instructions
.*
.sr opnd1="$s_reg1, $s_reg2, $d_reg"
.sr opnd2="$d_reg/$s_reg1, $s_reg2"
.sr opnd3="$s_reg1, val_immed, $d_reg"
.sr opnd4="$d_reg/$s_reg1, val_immed"
.sr opnd5="$s_reg, $d_reg"
.sr opnd6="$d_reg/$s_reg"
.sr opnd7="val_immed, $d_reg"
.sr opnd8="$d_reg, address"
.sr opnd9="$s_reg, address"
.*
.beglevel
.*
.section Load Address (lda)
.syntax
    lda &opnd8
.esyntax
.descrp
Compute the virtual address (by adding the 16-bit offset to the base
register) and place it in the destination register.
.exam begin
lda     $sp,-0x10($sp)

ldah    $a0,h^`L$0`($zero)
lda     $a0,l^`L$0`($a0)
.exam end
.edescrp
.category Memory Integer Load/Store Instruction
.section Load Address High (ldah)
.syntax
    ldah $d_reg, offset($b_reg)
.esyntax
.descrp
Compute the virtual address (by adding 65536 times the 16-bit offset
to the base register) and place it in the destination register.
.exam begin
ldah    $a0,h^`L$0`($zero)
lda     $a0,l^`L$0`($a0)
.exam end
.edescrp
.category Memory Integer Load/Store Instruction
.section Load F_floating (ldf)
.syntax
    ldf &opnd8
.esyntax
.descrp
The specified 4-byte F_floating datum is loaded from memory into the
specified register.
The datum must be longword aligned.
.edescrp
.category Memory Format Floating-Point Instruction
.section Load G_floating (Load D_floating) (ldg)
.syntax
    ldg &opnd8
.esyntax
.descrp
The specified 8-byte G_floating (or D_floating) datum is loaded from
memory into the specified register.
The datum must be quadword aligned.
.edescrp
.category Memory Format Floating-Point Instruction
.section Load Sign Extended Longword (ldl)
.syntax
    ldl &opnd8
.esyntax
.descrp
The specified longword is loaded from memory, sign-extended and placed
into the specified register.
.edescrp
.category Memory Integer Load/Store Instruction
.section Load Sign Extended Longword Locked (ldl_l)
.syntax
    ldl_l &opnd8
.esyntax
.descrp
The specified longword is loaded from memory, sign-extended and placed
into the specified register.
The memory block containing the specifed longword is locked against
physical access until a conditional store is done.
The size of the block is 2**n where "n" is implementation dependent.
.np
The sequence LDL_L, modify, STL_C, BEQ xxx executed on a given
processor does an atomic read-modify-write of a datum in shared memory
if the branch falls through; if the branch is taken, the store did not
modify memory and the sequence may be repeated until it succeeds.
The recommended method for an atomic update of a single datum is:
.exam begin
try_again:
    ldl_l   $r1,x
    <modify $r1>
    stl_c   $r1
    beq     $r1,no_store
    .
    .
    .
no_store:
    <code to check for excessive iterations>
    br      try_again
.exam end
.edescrp
.category Memory Integer Load/Store Instruction
.section Load Quadword (ldq)
.syntax
    ldq &opnd8
.esyntax
.descrp
The specified quadword is loaded from memory and placed into the
specified register.
.edescrp
.category Memory Integer Load/Store Instruction
.section Load Quadword Locked (ldq_l)
.syntax
    ldq_l &opnd8
.esyntax
.descrp
The specified quadword is loaded from memory and placed into the
specified register.
The memory block containing the specifed quadword is locked against
physical access until a conditional store is done.
The size of the block is 2**n where "n" is implementation dependent.
.np
The sequence LDQ_L, modify, STQ_C, BEQ xxx executed on a given
processor does an atomic read-modify-write of a datum in shared memory
if the branch falls through; if the branch is taken, the store did not
modify memory and the sequence may be repeated until it succeeds.
The recommended method for an atomic update of a single datum is:
.exam begin
try_again:
    ldq_l   $r1,x
    <modify $r1>
    stq_c   $r1
    beq     $r1,no_store
    .
    .
    .
no_store:
    <code to check for excessive iterations>
    br      try_again
.exam end
.edescrp
.category Memory Integer Load/Store Instruction
.section Load Quadword Unaligned (ldq_u)
.syntax
    ldq_u &opnd8
.esyntax
.descrp
The specified quadword is loaded from memory and placed into the
specified register.
The memory address that is computed is truncated to a multiple of 8
(i.e., the 3 bottom bits of the effective address are cleared).
.edescrp
.category Memory Integer Load/Store Instruction
.section Load S_floating (Load Longword) (lds)
.syntax
    lds &opnd8
.esyntax
.descrp
The specified 4-byte S_floating (or Longword Integer) datum is loaded
from memory into the specified register.
The datum must be longword aligned.
.edescrp
.begnote
.note Notes:
Longword integers in floating registers are stored in bits
<63:62,58:29>, with bits <61:59> ignored and zeros in bits <28:0>.
.endnote
.category Memory Format Floating-Point Instruction
.section Load T_floating (Load Quadword) (ldt)
.syntax
    ldt &opnd8
.esyntax
.descrp
The specified 8-byte T_floating (or Quadword Integer) datum is loaded
from memory into the specified register.
The datum must be quadword aligned.
.edescrp
.category Memory Format Floating-Point Instruction
.section Store F_floating (stf)
.syntax
    stf &opnd9
.esyntax
.descrp
The 4-byte F_floating datum in the specified register is stored into
memory. The location must be longword aligned.
.edescrp
.category Memory Format Floating-Point Instruction
.section Store G_floating (Store D_floating) (stg)
.syntax
    stg &opnd9
.esyntax
.descrp
The 8-byte G_floating (or D_floating) datum in the specified register
is stored into memory.
The location must be quadword aligned.
.edescrp
.category Memory Format Floating-Point Instruction
.section Store Longword (stl)
.syntax
    stl &opnd9
.esyntax
.descrp
The longword in the specified register is stored into memory.
If the data is not naturally aligned, an alignment exception is
generated.
.edescrp
.category Memory Integer Load/Store Instruction
.section Store Longword Conditional (stl_c)
.syntax
    stl_c &opnd9
.esyntax
.descrp
The longword in the specified register is stored into memory provided
that the lock_flag is set (see ldl_l).
The lock_flag is returned in the same register.
.np
The memory block containing the specifed longword should have been
locked against physical access using the ldl_l instruction.
.np
The sequence LDL_L, modify, STL_C, BEQ xxx executed on a given
processor does an atomic read-modify-write of a datum in shared memory
if the branch falls through; if the branch is taken, the store did not
modify memory and the sequence may be repeated until it succeeds.
The recommended method for an atomic update of a single datum is:
.exam begin
try_again:
    ldl_l   $r1,x
    <modify $r1>
    stl_c   $r1
    beq     $r1,no_store
    .
    .
    .
no_store:
    <code to check for excessive iterations>
    br      try_again
.exam end
.edescrp
.category Memory Integer Load/Store Instruction
.section Store Quadword (stq)
.syntax
    stq &opnd9
.esyntax
.descrp
The quadword in the specified register is stored into memory.
If the data is not naturally aligned, an alignment exception is
generated.
.edescrp
.category Memory Integer Load/Store Instruction
.section Store Quadword Conditional (stq_c)
.syntax
    stq_c &opnd9
.esyntax
.descrp
The quadword in the specified register is stored into memory provided
that the lock_flag is set (see ldq_l).
The lock_flag is returned in the same register.
.np
The memory block containing the specifed quadword should have been
locked against physical access using the ldq_l instruction.
.np
The sequence LDQ_L, modify, STQ_C, BEQ xxx executed on a given
processor does an atomic read-modify-write of a datum in shared memory
if the branch falls through; if the branch is taken, the store did not
modify memory and the sequence may be repeated until it succeeds.
The recommended method for an atomic update of a single datum is:
.exam begin
try_again:
    ldq_l   $r1,x
    <modify $r1>
    stq_c   $r1
    beq     $r1,no_store
    .
    .
    .
no_store:
    <code to check for excessive iterations>
    br      try_again
.exam end
.edescrp
.category Memory Integer Load/Store Instruction
.section Store Quadword Unaligned (stq_u)
.syntax
    stq_u &opnd9
.esyntax
.descrp