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<b><font color="#990033">Product Demo:</font> Spartan-3A Starter Kit
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<span class="presenter">Eric Crabill, Staff Design Engineer</span><br>
This presentation shows key examples of how the Spartan-3A Starter Kit delivers instant access to the powerful Spartan-3A FPGA device features of suspend power-saving mode, high-speed I/O options, DDR2 SDRAM memory interface, commodity flash configuration support, and FPGA/IP protection using Device DNA. The Spartan™-3A FPGA Starter Kit is a RoHS compliant, complete development solution which gives designers instant access to the capabilities of the Spartan-3A family. The kit includes Spartan-3A starter kit board, power supply with universal adaptors, programming cable, quick-start guide, evaluation software, collateral and more.
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<td width="80%"><a name="memory"></a>Memory Interfaces</td>
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<td><b><font color="#990033">Product Demo:</font> Memory Interfaces Solutions with Xilinx FPGAs
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<span class="presenter">Adrian Cosoroaba, Solutions Manager</span><br>
This demo overviews memory interfaces solutions from low cost implementations using Spartan 3A FPGAs to high performance solutions with Virtex-5 FPGAs. A design example with complete RTL and UCF files is generated using the Memory Interface Generator (MIG) software for the DDR2 SDRAM interface. Additionally, hardware system verification and a demonstration are performed using the ChipScopePro in circuit analyzer for a 667 DDR2 SDRAM DIMM interface with the Virtex-5 FPGA. </td>
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<td> <!-- Virtex 4 overview XIL017--><a name="17"></a>
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<td><b><font color="#990033">Product Demo:</font> Virtex-4 Memory Interfaces</b><!-- <img src="/clients/xilinx/001/page/images_page/new.gif" width="29" height="15" border="0" align="top" vspace="2">--><br>
<span class="presenter">Adrian Cosoroaba, Marketing Manager</span><br>
This demo tours the 533 Mbps DDR2 SDRAM memory interface
design using the Memory Interface Generator, a hardware
system verification for the 300 MHz QDR II SRAM
interface design using the ChipScope Pro in circuit
analyzer and the Xilinx Advanced Memory Development
System. Also included is a overview of the complete
Memory Interface solutions using Virtex-4.</td>
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<td><!--Memory Solutions demo XIL011--><a name="11"></a>
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<td><b><font color="#990033">Product Demo:</font>
Virtex-II Pro™ Memory Interface Solutions</b><br>
<span class="presenter">Adrian Cosoroaba, Marketing
Manager</span><br>
This comprehensive demo takes you through the system
verification of the DDR SDRAM design using the ChipScope
Pro in circuit analyzer and the Xilinx evaluation
board for 200 MHZ (400 Mbps) DDR SDRAM. Included
is also an overview of the 200 MHz (400 Mbps) DDR
SDRAM and 200 MHz (800 Mbps) QDR II SRAM hardware
solutions using the Virtex-II Pro FPGA device.</td>
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<td width="80%"><a name="connectivity"></a>Connectivity</td>
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<b><font color="#990033">Product Demo:</font> System Performance Demo using Spartan-3 PCIe Starter Kit</b><br>
<span class="presenter">Navneet Rao, Marketing Manager, Connectivity, Horizontal Platform Solutions
</span><br>
This performance demo, based on the Spartan-3 FPGA PCIe Starter Kit, shows system throughput of the PCI Express link in a 1-lane configuration.
The Starter kit is plugged into a 1-lane PCIe slot in a commonly available desktop. The demonstration package includes a hardware design,
a PCIe bus-mastering DMA validation function reference design, implemented as a user design behind the Xilinx PCIe IP LogiCORE that
initiates the traffic between the add-in card and the system main memory. Software control is provided by a GUI, which controls the
device driver and the application to run this demonstration.</td>
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