?? iic.c
字號:
rIICSTAT = 0xf0;
//Clearing the pending bit isn't needed because the pending bit has been cleared.
while(_iicDataCount!=-1)
Run_IicPoll();
_iicMode = POLLACK;
while(1)
{
rIICDS = slvAddr;
_iicStatus = 0x100; //To check if _iicStatus is changed
rIICSTAT = 0xf0; //Master Tx, Start, Output Enable, Sucessful, Cleared, Cleared, 0
rIICCON = 0xaf; //Resumes IIC operation.
while(_iicStatus==0x100)
Run_IicPoll();
if(!(_iicStatus & 0x1))
break; //When ACK is received
}
rIICSTAT = 0xd0; //Master Tx condition, Stop(Write), Output Enable
rIICCON = 0xaf; //Resumes IIC operation.
Delay(1); //Wait until stop condtion is in effect.
//Write is completed.
}
//************************[ _Rd24C080 ]********************************
void _Rd24C080(U32 slvAddr,U32 addr,U8 *data)
{
_iicMode = SETRDADDR;
_iicPt = 0;
_iicData[0] = (U8)addr;
_iicDataCount = 1;
rIICDS = slvAddr;
rIICSTAT = 0xf0; //MasTx,Start
//Clearing the pending bit isn't needed because the pending bit has been cleared.
while(_iicDataCount!=-1)
Run_IicPoll();
_iicMode = RDDATA;
_iicPt = 0;
_iicDataCount = 1;
rIICDS = slvAddr;
rIICSTAT = 0xb0; //Master Rx,Start
rIICCON = 0xaf; //Resumes IIC operation.
while(_iicDataCount!=-1)
Run_IicPoll();
*data = _iicData[1];
}
//**********************[ Run_IicPoll ]*********************************
void Run_IicPoll(void)
{
if(rIICCON & 0x10) //Tx/Rx Interrupt Enable
IicPoll();
}
//**********************[IicPoll ]**************************************
void IicPoll(void)
{
U32 iicSt,i;
iicSt = rIICSTAT;
if(iicSt & 0x8){} //When bus arbitration is failed.
if(iicSt & 0x4){} //When a slave address is matched with IICADD
if(iicSt & 0x2){} //When a slave address is 0000000b
if(iicSt & 0x1){} //When ACK isn't received
switch(_iicMode)
{
case POLLACK:
_iicStatus = iicSt;
break;
case RDDATA:
if((_iicDataCount--)==0)
{
_iicData[_iicPt++] = rIICDS;
rIICSTAT = 0x90; //Stop MasRx condition
rIICCON = 0xaf; //Resumes IIC operation.
Delay(1); //Wait until stop condtion is in effect.
//Too long time...
//The pending bit will not be set after issuing stop condition.
break;
}
_iicData[_iicPt++] = rIICDS;
//The last data has to be read with no ack.
if((_iicDataCount)==0)
rIICCON = 0x2f; //Resumes IIC operation with NOACK.
else
rIICCON = 0xaf; //Resumes IIC operation with ACK
break;
case WRDATA:
if((_iicDataCount--)==0)
{
rIICSTAT = 0xd0; //stop MasTx condition
rIICCON = 0xaf; //resumes IIC operation.
Delay(1); //wait until stop condtion is in effect.
//The pending bit will not be set after issuing stop condition.
break;
}
rIICDS = _iicData[_iicPt++]; //_iicData[0] has dummy.
for(i=0;i<10;i++); //for setup time until rising edge of IICSCL
rIICCON = 0xaf; //resumes IIC operation.
break;
case SETRDADDR:
//printf("[S%d]",_iicDataCount);
if((_iicDataCount--)==0)
{
break; //IIC operation is stopped because of IICCON[4]
}
rIICDS = _iicData[_iicPt++];
for(i=0;i<10;i++); //for setup time until rising edge of IICSCL
rIICCON = 0xaf; //resumes IIC operation.
break;
default:
break;
}
}
//##################################################################################
#if 0
void IIC_Write(unsigned char slvAddr, unsigned char addr, unsigned char data);
void Test_Iic_MstrTx(void)
{
int i=0;
unsigned int save_E,save_PE;
save_E = rGPECON;
save_PE = rGPEDN;
rGPEDN |= 0xc000; //Pull-up disable
rGPECON |= 0xa0000000; //GPE15:IICSDA , GPE14:IICSCL
while(i<100) {
if(Uart_GetKey()=='x') break;
IIC_Write((unsigned char)0xc0,(unsigned char)i,(unsigned char)i);
printf("%d\n",i++);
}
rGPEDN = save_PE;
rGPECON = save_E;
}
//IIC Master Tx
void IIC_Write(unsigned char slvAddr, unsigned char addr, unsigned char data)
{
unsigned int iicSt, i;
unsigned char _iicData[2];
int _iicDataCount, _iicStatus, _iicPt;
_iicData[0] = addr;
_iicData[1] = data;
_iicDataCount = 1;
_iicPt = 0;
rIICCON = (1<<7) | (0<<6) | (1<<5) | (0xf); // Ack Enable,Pclk/16,Interrupt,Prescler
rIICADD = 0xc0; //2413 slave address = [7:1]
rIICSTAT = 0x10; //IIC bus data output enable(Rx/Tx)
rIICLC = (1<<2)|(1); // Filter enable, 15 clocks SDA output delay added by junon
//Data Write Phase
rIICDS = slvAddr; //0xa0
rIICSTAT = 0xf0; // Master Transmit, Start, Serial Output Enable
while(_iicDataCount!=-1)
{
if(rIICCON & 0x10) // Wait for Interrupt pending
{
if((_iicDataCount--)==0)
{
rIICSTAT = 0xd0; //stop MasTx condition
rIICCON = 0xaf; //resumes IIC operation.
Delay(1); //wait until stop condtion is in effect.
break;
}
rIICDS = _iicData[_iicPt++];
for(i=0;i<10;i++); //for setup time until rising edge of IICSCL
rIICCON = 0xaf; //resumes IIC operation.
}
}
rIICSTAT = 0xd0; //Master Tx condition, Stop(Write), Output Enable
rIICCON = 0xaf; //Resumes IIC operation.
Delay(1); //Wait until stop condtion is in effect.
//Write is completed.
}
#else
void Test_Iic_MstrTx(void)
{
int i=0;
unsigned int save_E,save_PE;
unsigned char data[100];
printf("IIC Master Tx Test (Board to Board)\n");
printf("Connect IIC related signals (IICSCL, IICSDA, and GND) betweem IIC Master TX Board and IIC Slave RX Board.\n");
printf("First, IIC Slave Board should is ready and then Press any key.\n");
GetIntNum();
save_E = rGPECON;
save_PE = rGPEDN;
rGPEDN |= 0xc000; //Pull-up disable
rGPECON |= 0xa0000000; //GPE15:IICSDA , GPE14:IICSCL
for(i=0;i<100;i++)
data[i]=(unsigned char)i;
IIC_Write((unsigned char)0xc0, data);
rGPEDN = save_PE;
rGPECON = save_E;
}
//IIC Master Tx
void IIC_Write(unsigned char slvAddr, unsigned char* data)
{
unsigned int iicSt, i;
int _iicDataCount, _iicStatus, _iicPt;
_iicDataCount = 100;
_iicPt = 0;
rIICCON = (1<<7) | (1<<6) | (1<<5) | (0xf); // Ack Enable,Pclk/16,Interrupt,Prescler
rIICADD = 0xc0; //2413 slave address = [7:1]
rIICSTAT = 0xd0; //IIC bus data output enable(Rx/Tx)
rIICLC = (1<<2)|(1); // Filter enable, 15 clocks SDA output delay added by junon
//Data Write Phase
rIICDS = slvAddr; //0xa0
rIICSTAT = 0xf0; // Master Transmit, Start, Serial Output Enable
while(_iicDataCount!=-1)
{
if(rIICCON & 0x10) // Wait for Interrupt pending
{
if((_iicDataCount--)==0)
{
rIICSTAT = 0xd0; //stop MasTx condition
rIICCON = 0xaf; //resumes IIC operation.
Delay(1); //wait until stop condtion is in effect.
break;
}
rIICDS = data[_iicPt++];
for(i=0;i<10;i++); //for setup time until rising edge of IICSCL
rIICCON = 0xaf; //resumes IIC operation.
}
}
rIICSTAT = 0xd0; //Master Tx condition, Stop(Write), Output Enable
rIICCON = 0xaf; //Resumes IIC operation.
Delay(1); //Wait until stop condtion is in effect.
//Write is completed.
}
#endif
void Test_Iic_SlvRx(void)
{
unsigned int i,j,save_E,save_PE;
static U8 data[256];
static U8 slaveaddr;
static U8 *slave_addr;
printf("IIC Slave Rx Test...\n");
save_E = rGPECON;
save_PE = rGPEDN;
rGPEDN |= 0xc000; //Pull-up disable
rGPECON |= 0xa0000000; //GPE15:IICSDA , GPE14:IICSCL
for(i=0;i<100;i++)
data[i]=0;
printf("IIC Slave Rx Test (Board to Board)\n");
printf("Connect IIC related signals (IICSCL, IICSDA, and GND) betweem IIC Master TX Board and IIC Slave RX Board.\n");
printf("Waiting for Receiving Data\n");
IIC_Read(&slaveaddr,data);
printf("Received Addr.: 0x%x\n",(int)slaveaddr);
for(i=1;i<100;i++)
printf("Received Data : 0x%0x\n",(int)data[i]);
rGPEDN = save_PE;
rGPECON = save_E;
}
// Slave Rx
void IIC_Read(unsigned char *slave_addr, unsigned char *Data)
{
unsigned int iicSt, i;
unsigned char _iicData[2];
int _iicDataCount, _iicStatus, _iicPt;
rIICCON = (1<<7) | (1<<6) | (1<<5) | (0xf); // Ack Enable,Pclk/16,Interrupt,Prescler
rIICADD = 0xc0; //2413 slave address = [7:1]
rIICSTAT = 0x10; //IIC bus data output enable(Rx/Tx)
rIICLC = (1<<2)|(1); // Filter enable, 15 clocks SDA output delay, added by junon
printf("Wait for Slave Addr\n");
while((rIICSTAT&0x4)==0)
{
}
i=0;
while(i<100)
{
if(rIICCON&0x10)
{
Data[i]=(U8)rIICDS;
i++;
rIICCON = 0xaf;
}
}
*slave_addr=Data[0];
rIICSTAT=0x0;
}
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