?? evmdm642_osd.c
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/*
* Copyright 2003 by Texas Instruments Incorporated.
* All rights reserved. Property of Texas Instruments Incorporated.
* Restricted rights to use, duplicate or disclose this code are
* granted through contract.
*
*/
/* "@(#) DDK 1.10.00.23 07-02-03 (ddk-b12)" */
/*
* ======== evmdm642_osd.c ========
* EVMDM642 interrupt handling routines.
*/
#define CHIP_DM642 1
#include <std.h>
#include <atm.h>
#include <csl.h>
#include <csl_irq.h>
#include <evmdm642.h>
#include <evmdm642_osd.h>
static struct {
EVMDM642_OSD_IntHandler func;
Ptr arg;
} dispatchTable[EVMDM642_OSD_NUM_IRQ];
static void irqHandler1(void);
static void irqHandler2(void);
static void irqHandler3(void);
static void irqHandler4(void);
/*
* ======== EVMDM642_OSD_init ========
* Initialize the CPLD interrupt handling module.
* Clear all enabled interrupts in the CPLD, add a dispatch
* handler for EINT7, and enable the interrupt enable line
* in the OSD control register.
*/
void EVMDM642_OSD_init()
{
int i, gie;
static int initDone = 0;
if (!ATM_seti(&initDone, 1)) {
gie = IRQ_globalDisable();
for (i = 0; i < EVMDM642_OSD_NUM_IRQ; i++) {
dispatchTable[i].func = 0;
dispatchTable[i].arg = 0;
}
HWI_dispatchPlug(IRQ_EVT_EXTINT6, irqHandler1, -1, 0); //UART A
IRQ_clear(IRQ_EVT_EXTINT6);
IRQ_enable(IRQ_EVT_EXTINT6);
HWI_dispatchPlug(IRQ_EVT_EXTINT7, irqHandler2, -1, 0); //UART B
IRQ_clear(IRQ_EVT_EXTINT7);
IRQ_enable(IRQ_EVT_EXTINT7);
HWI_dispatchPlug(IRQ_EVT_EXTINT4, irqHandler3, -1, 0); //UART C
IRQ_clear(IRQ_EVT_EXTINT4);
IRQ_enable(IRQ_EVT_EXTINT4);
HWI_dispatchPlug(IRQ_EVT_EXTINT5, irqHandler4, -1, 0); //UART D
IRQ_clear(IRQ_EVT_EXTINT5);
IRQ_enable(IRQ_EVT_EXTINT5);
IRQ_globalRestore(gie);
}
}
/*
* ======== EVMDM642_OSD_intHook ========
* Hook sub-interrupt index on the CPLD interrupt vector. The
* given function (func) will be called with argument arg when
* the interrupt becomes active.
*/
EVMDM642_OSD_IntHandler EVMDM642_OSD_intHook(Uint32 index,
EVMDM642_OSD_IntHandler func, Ptr arg)
{
int gie;
EVMDM642_OSD_IntHandler oldIsr = (EVMDM642_OSD_IntHandler) NULL;
if (index < EVMDM642_OSD_NUM_IRQ) {
gie = IRQ_globalDisable();
oldIsr = dispatchTable[index].func;
dispatchTable[index].func = func;
dispatchTable[index].arg = arg;
IRQ_globalRestore(gie);
}
return oldIsr;
}
/*
* ======== EVMDM642_OSD_intUnhook ========
* Unhook sub-interrupt index on the CPLD interrupt vector.
* This will disable the given sub-interrupt, and zero out
* the dispatch vector.
*/
EVMDM642_OSD_IntHandler EVMDM642_OSD_intUnhook(Uint32 index)
{
int gie;
EVMDM642_OSD_IntHandler oldIsr = (EVMDM642_OSD_IntHandler) NULL;
if (index < EVMDM642_OSD_NUM_IRQ) {
gie = IRQ_globalDisable();
oldIsr = dispatchTable[index].func;
dispatchTable[index].func = 0;
dispatchTable[index].arg = 0;
IRQ_globalRestore(gie);
}
return oldIsr;
}
/*
* ======== irqHandler ========
* Local interrupt handler for the CPLD interrupt. Will dispatch
* all enabled and active interrupts to the appropriate sub-interrupt
* vector.
* The global interrupt enable in the OSD control register keeps
* us from having to cycle on irqFlags != 0. Enabling the global
* interrupts at the end of the IRQ handler will automatically
* generate another interrupt if any interrupt bit is still set.
*/
static void irqHandler1(void)
{
if (dispatchTable[UARTA_IRQ].func) {
(*(dispatchTable[UARTA_IRQ].func))(dispatchTable[UARTA_IRQ].arg);
}
}
static void irqHandler2(void)
{
if (dispatchTable[UARTB_IRQ].func) {
(*(dispatchTable[UARTB_IRQ].func))(dispatchTable[UARTB_IRQ].arg);
}
}
static void irqHandler3(void)
{
if (dispatchTable[UARTC_IRQ].func) {
(*(dispatchTable[UARTC_IRQ].func))(dispatchTable[UARTC_IRQ].arg);
}
}
static void irqHandler4(void)
{
if (dispatchTable[UARTD_IRQ].func) {
(*(dispatchTable[UARTD_IRQ].func))(dispatchTable[UARTD_IRQ].arg);
}
}
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