/****************************************************************************/
/*             TEXAS INSTRUMENTS PROPRIETARY INFORMATION                    */
/*                                                                          */
/*  (c) Copyright, Texas Instruments Incorporated, 2005-2007.               */
/*      All Rights Reserved.                                                */
/*                                                                          */
/*  Property of Texas Instruments Incorporated. Restricted Rights -         */
/*  Use, duplication, or disclosure is subject to restrictions set          */
/*  forth in TI's program license agreement and associated documentation.   */
/****************************************************************************/
/**
 *
 * @file     TVP7001.h
 *
 * @brief    Driver for TVP7001
 *
 * This file contains type definitions, macros, and function 
 * prototypes necessary to drive the TVP7000. Many of the functions described 
 * here are called by the AutoLock APIs and from the AutoLock task functions.
 * The majority, however, are provided for completeness. As the
 * AutoLock algorithm matures, functions may switch between
 * these two categories. The functions currently called by 
 * AutoLock are as follows:
 *
 * - ADC_CfgADC()
 * - ADC_InitADC()
 * - ADC_GetMaxSampleFreqInMHz()
 * - ADC_SetPhase()
 * - ADC_GetPhase()
 * - ADC_GetPhaseLimits()
 * - ADC_SetGain()
 * - ADC_GetGain() 
 * - ADC_GetGainLimits()
 * - ADC_SetOffset()
 * - ADC_GetOffset() 
 * - ADC_GetOffsetLimits() 
 * - ADC_SetGainAndOffset()
 * - ADC_SetInputHSYNCPolarity()
 * - ADC_SetOutputHSYNCPolarity()
 * - ADC_SetActiveHSYNC()
 * - ADC_SetActiveVSYNC()
 * - ADC_SetRedClampLevel()
 * - ADC_SetBlueClampLevel()
 * - ADC_SetClampDuration()
 * - ADC_SetClampPlacement()
 * - ADC_SetPreCoast()
 * - ADC_SetPostCoast()
 * - ADC_SetSampleClock()
 * - ADC_SetPLLDivider()
 * - ADC_GetPLLDivider()
 * - ADC_GetPLLLimits()
 * - ADC_IsI2CDead()
 * 
 * Any OEM developed ADC drivers must include the functions
 * listed above. Descriptions of these functions' use can be
 * found in the documentation below. Note the supported
 * functions return a variety of error codes. OEM supplied
 * functions may limit return codes to PASS or FAIL. 
 *
 * This driver stores the ADC default values in an array
 * when the function ADC_InitADC() is called. Subsequent
 * calls to these driver functions will operate on the 
 * stored value followed by a register write rather than 
 * performing a register read-modify-write. Therefore, any
 * changes to register settings through any method other than
 * the use of these driver functions may be overwritten. 
 * 
 * It is recommended that OEM supplied drivers and OEM
 * application code make use of RTOS semaphores to reserve 
 * and protect communications resources. The implementation 
 * of this driver requires the successful reservation of the 
 * I2C bus resource semaphore before initiating an I2C transaction. 
 * This is a meaningless exercise unless the OEM application
 * respects semaphore ownership. The API function I2C_Init()
 * creates an I2C semaphore via a call to RTA_SemCreate(). The
 * semaphore ID can be obtained by calling I2C_GetSemaphoreID().  
 *
 * I2C communications are executed with the following I2C API 
 * function calls:
 *
 * - I2C_PolledMasterWrite()
 * - I2C_PolledMasterWriteRestartRead() 						
 *
 * Please refer to API documentation for descriptions of these
 * functions.
 */

#ifndef __TVP7001_H
#define __TVP7001_H

#ifdef __cplusplus
extern "C" {
#endif


/*****************************************************************************/
/* Error codes ***************************************************************/
/*****************************************************************************/

/* Error codes generated by the ADC driver */
#define ADC_FUNCTION_NOT_SUPPORTED		-1
#define ADC_FIELD_LIMITS_UNSPECIFIED	-2
#define ADC_VALUE_OOR_MIN				-3
#define ADC_VALUE_OOR_MAX				-4

/* Error code specifying an I2C driver error */
#define ADC_I2C_DRIVER_ERROR			-5
#define ADC_I2C_DRIVER_TERMINAL_ERROR   -8

/* Error code specifying RTA errors */
#define ADC_RTA_SEM_IN_USE				-6
#define ADC_RTA_ERROR		   		    -7

/*****************************************************************************/
/* Macros defining function arguments ****************************************/
/*****************************************************************************/

/* Color */
#define ADC_RED     0
#define ADC_GREEN   1
#define ADC_BLUE    2


/* Pixel clock source */
#define ADC_INTERNAL_PCLK   0
#define ADC_EXTERNAL_PCLK   1

/* Output phase */
#define ADC_FIRST_PIXEL_ON_A    0
#define ADC_FIRST_PIXEL_ON_B    1

/* Output width */
#define ADC_24_BIT  0
#define ADC_48_BIT  1

/* Output mode */
#define ADC_INTERLEAVED  0
#define ADC_PARALLEL     1

/* Clamp source */
#define ADC_INTERNAL_CLAMP  0
#define ADC_EXTERNAL_CLAMP  1

/* External clamp polarity */
#define ADC_CLAMP_NEGATIVE   0
#define ADC_CLAMP_POSITIVE   1

/* Coast source */
#define ADC_EXTERNAL_COAST  0
#define ADC_INTERNAL_COAST  1

/* Coast enable */
#define ADC_COAST_DISABLED    0
#define ADC_COAST_ENABLED	  1

/* External coast polarity */
#define ADC_COAST_IN_NEGATIVE  0
#define ADC_COAST_IN_POSITIVE  1

/* Input HSYNC polarity */
#define ADC_HSYNC_IN_NEGATIVE   0
#define ADC_HSYNC_IN_POSITIVE   1

/* Output HSYNC polarity */
#define ADC_HSYNC_OUT_NEGATIVE   0
#define ADC_HSYNC_OUT_POSITIVE   1

/* Input VSYNC polarity */
#define ADC_VSYNC_IN_NEGATIVE   0
#define ADC_VSYNC_IN_POSITIVE   1

/* Output VSYNC invert */
#define ADC_VSYNC_OUT_NOT_INVERTED      0
#define ADC_VSYNC_OUT_INVERTED  		1

/* Clamp select */
#define ADC_CLAMP_TO_GROUND     0
#define ADC_CLAMP_TO_MIDLEVEL   1

/* Active HSYNC source */
#define ADC_HSYNC_SRCD_BY_HSYNC_INPUT   0
#define ADC_HSYNC_SRCD_BY_SOG_INPUT     1    

/* Active VSYNC source */
#define ADC_VSYNC_SRCD_BY_VSYNC_INPUT   0
#define ADC_VSYNC_SRCD_BY_SEPARATOR     1    

/* Video output mode */
#define ADC_VIDEO_OUT_444   0
#define ADC_VIDEO_OUT_422   1

/* Output power */
#define ADC_OUTPUTS_NOT_TRISTATED   0
#define ADC_OUTPUTS_TRISTATED       1

/* Active interface select mode */
#define ADC_AUTO_IF_SELECT    0
#define ADC_MANUAL_IF_SELECT  1

/* Active interface select */
#define ADC_ANALOG_INTERFACE    0
#define ADC_DIGITAL_INTERFACE   1

/* Active HSYNC select mode */
#define ADC_AUTO_HSYNC_SELECT     0
#define ADC_MANUAL_HSYNC_SELECT   1

/* Active HSYNC select */
#define ADC_HSYNC_INPUT     0
#define ADC_SOG_INPUT       1

/* Active VSYNC select mode */
#define ADC_AUTO_VSYNC_SELECT    0
#define ADC_MANUAL_VSYNC_SELECT  1

/* Active VSYNC select */
#define ADC_VSYNC_INPUT             0
#define ADC_SYNC_SEPARATOR_OUTPUT   1

/* Chip power */
#define ADC_CHIP_POWER_DOWN     0
#define ADC_CHIP_POWER_UP       1

/* Scan function */
#define ADC_SCAN_FUNCTION_DISABLED  0
#define ADC_SCAN_FUNCTION_ENABLED   1

/* Coast polarity select mode */
#define ADC_AUTO_SELECT_COAST_POLARITY      0
#define ADC_MANUAL_SELECT_COAST_POLARITY    1

/* HSYNC polarity select mode */
#define ADC_AUTO_SELECT_HSYNC_POLARITY      0
#define ADC_MANUAL_SELECT_HSYNC_POLARITY    1

/* VSYNC polarity select mode */
#define ADC_AUTO_SELECT_VSYNC_POLARITY      0
#define ADC_MANUAL_SELECT_VSYNC_POLARITY    1

/* DVI Clock Inverted */
#define ADC_DVI_CLOCK_NOT_INVERTED	0
#define ADC_DVI_CLOCK_INVERTED		1

/* HDCP Master Serial Port */