?? example_28xswprioritizeddefaultisr.c
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//
// TMDX BETA RELEASE
// Intended for product evaluation purposes
//
//###########################################################################
//
// FILE: Example_28xSWPrioritizedDefaultIsr.c
//
// TITLE: DSP28 Device Default Software Prioritized Interrupt Service Routines.
//
// This file is based on the standard Example_28xSWPrioritizedDefaultIsr.c
//
// The ISR routines have been modified slightly to provide a trace
// mechanism used for this example
//
//###########################################################################
//
// Ver | dd mmm yyyy | Who | Description of changes
// =====|=============|======|===============================================
// 0.1 | 22 Jul 2002 | A.T. | Original Release
// -----|-------------|------|-----------------------------------------------
//###########################################################################
#include "DSP28_Device.h"
// Defined in the Example_28xSWPrioritizedInterrupts.c file
// for this example only
extern Uint16 ISRTrace[50];
extern Uint16 ISRTraceIndex;
// Used for ISR delays
Uint16 i;
//---------------------------------------------------------------------------
// XINT13, TINT2, NMI, XINT1, XINT2 Default ISRs:
//---------------------------------------------------------------------------
//
// Connected to INT13 of CPU (use MINT13 mask):
#if (INT13PL != 0)
interrupt void INT13_ISR(void) // XINT13
{
IER |= MINT13; // Set "global" priority
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
#endif
// Connected to INT14 of CPU (use MINT14 mask):
#if (INT14PL != 0)
interrupt void INT14_ISR(void) // CPU-Timer2
{
IER |= MINT14; // Set "global" priority
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
#endif
// Connected to NMI of CPU (non-maskable):
interrupt void NMI_ISR(void) // Non-maskable interrupt
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
// Connected to PIEIER1_4 (use MINT1 and MG14 masks):
#if (G14PL != 0)
interrupt void XINT1_ISR(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
IER |= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER1.all &= MG14; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
asm(" NOP");
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER1.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0014;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER1_5 (use MINT1 and MG15 masks):
#if (G15PL != 0)
interrupt void XINT2_ISR(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
IER |= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER1.all &= MG15; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER1.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0015;
ISRTraceIndex++;
}
#endif
//---------------------------------------------------------------------------
// DATALOG, RTOSINT, EMUINT Default ISRs:
//---------------------------------------------------------------------------
//
// Connected to INT15 of CPU (use MINT15 mask):
#if (INT15PL != 0)
interrupt void DATALOG_ISR(void) // Datalogging interrupt
{
IER |= MINT15; // Set "global" priority
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
#endif
// Connected to INT16 of CPU (use MINT16 mask):
#if (INT16PL != 0)
interrupt void RTOSINT_ISR(void) // RTOS interrupt
{
IER |= MINT16; // Set "global" priority
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
#endif
// Connected to EMUINT of CPU (non-maskable):
interrupt void EMUINT_ISR(void) // Emulation interrupt
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
//---------------------------------------------------------------------------
// ILLEGAL Instruction Trap ISR:
//
interrupt void ILLEGAL_ISR(void) // Illegal operation TRAP
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
//---------------------------------------------------------------------------
// USER Traps Default ISRs:
//
interrupt void USER0_ISR(void) // User Defined trap 0
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER1_ISR(void) // User Defined trap 1
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER2_ISR(void) // User Defined trap 2
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER3_ISR(void) // User Defined trap 3
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER4_ISR(void) // User Defined trap 4
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER5_ISR(void) // User Defined trap 5
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER6_ISR(void) // User Defined trap 6
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER7_ISR(void) // User Defined trap 7
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER8_ISR(void) // User Defined trap 8
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER9_ISR(void) // User Defined trap 9
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER10_ISR(void) // User Defined trap 10
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER11_ISR(void) // User Defined trap 11
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
//---------------------------------------------------------------------------
// ADC Default ISR:
//
// Connected to PIEIER1_6 (use MINT1 and MG16 masks):
#if (G16PL != 0)
interrupt void ADCINT_ISR(void) // ADC
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
IER |= M_INT1;
IER &= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER9.all &= MG16; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER9.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0016;
ISRTraceIndex++;
}
#endif
//---------------------------------------------------------------------------
// CPU Timer 0 Default ISR:
//
// Connected to PIEIER1_7 (use MINT1 and MG17 masks):
#if (G17PL != 0)
interrupt void TINT0_ISR(void) // CPU-Timer 0
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
IER |= M_INT1;
IER &= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER1.all &= MG17; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER1.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0017;
ISRTraceIndex++;
}
#endif
//---------------------------------------------------------------------------
// Watchdog/Low Power Modes Default ISR:
//
// Connected to PIEIER1_8 (use MINT1 and MG18 masks):
#if (G18PL != 0)
interrupt void WAKEINT_ISR(void) // WD/LPM
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
IER |= M_INT1;
IER &= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER1.all &= MG18; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER1.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0018;
ISRTraceIndex++;
}
#endif
//---------------------------------------------------------------------------
// EV-A Default ISRs:
//
// Connected to PIEIER1_1 (use MINT1 and MG11 masks):
#if (G11PL != 0)
interrupt void PDPINTA_ISR( void ) // EV-A
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
IER |= M_INT1;
IER &= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER1.all &= MG11; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER1.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0011;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER2_1 (use MINT2 and MG21 masks):
#if (G21PL != 0)
interrupt void CMP1INT_ISR(void) // EV-A
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG21; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
// for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Add ISR to Trace
// ISRTrace[ISRTraceIndex] = 0x0021;
// ISRTraceIndex++;
}
#endif
// Connected to PIEIER2_2 (use MINT2 and MG22 masks):
#if (G22PL != 0)
interrupt void CMP2INT_ISR(void) // EV-A
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG22; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0022;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER2_3 (use MINT2 and MG23 masks):
#if (G23PL != 0)
interrupt void CMP3INT_ISR(void) // EV-A
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG23; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0023;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER2_4 (use MINT2 and MG24 masks):
#if (G24PL != 0)
interrupt void T1PINT_ISR(void) // EV-A
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG24; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
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