//*******************************************************************       ////IMPORTANT NOTICE                                                          ////================                                                          ////Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  ////This file and associated deliverables are the trade secrets,              ////confidential information and copyrighted works of Mentor Graphics         ////Corporation and its licensors and are subject to your license agreement   ////with Mentor Graphics Corporation.                                         ////                                                                          ////These deliverables may be used for the purpose of making silicon for one  ////IC design only.  No further use of these deliverables for the purpose of  ////making silicon from an IC design is permitted without the payment of an   ////additional license fee.  See your license agreement with Mentor Graphics  ////for further details.  If you have further questions please contact        ////Mentor Graphics Customer Support.                                         ////                                                                          ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on         ////workstation hostid 800059c1 Inventra                                      //// Adder Tree Element 3// Copyright Mentor Graphics Corporation and Licensors 1998.// V1.000// m3s092ct.v// M320C50 Adder Tree Element 3// This module provides the 3rd level of the adder tree for the M320C50 multiplier.module m3s092ct (QQ, PP);//*******************************************************************       ////IMPORTANT NOTICE                                                          ////================                                                          ////Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  ////This file and associated deliverables are the trade secrets,              ////confidential information and copyrighted works of Mentor Graphics         ////Corporation and its licensors and are subject to your license agreement   ////with Mentor Graphics Corporation.                                         ////                                                                          ////These deliverables may be used for the purpose of making silicon for one  ////IC design only.  No further use of these deliverables for the purpose of  ////making silicon from an IC design is permitted without the payment of an   ////additional license fee.  See your license agreement with Mentor Graphics  ////for further details.  If you have further questions please contact        ////Mentor Graphics Customer Support.                                         ////                                                                          ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on         ////workstation hostid 800059c1 Inventra                                      //    input [131:0]  PP;  output [98:0] QQ;  reg [98:0] QQ;  reg [3:0]  Depth;  integer    l, m, n;// Partial Product adder tree first stagealways @(PP)begin  for (l=0;l<31;l=l+1)  begin    case (l)      0: Depth = 1;      1: Depth = 1;      2: Depth = 1;      3: Depth = 2;      4: Depth = 2;      5: Depth = 3;      6: Depth = 3;      7: Depth = 4;      8: Depth = 4;      9: Depth = 5;      10: Depth = 5;      11: Depth = 5;      12: Depth = 6;      13: Depth = 6;      14: Depth = 7;      15: Depth = 7;      16: Depth = 8;      17: Depth = 8;      18: Depth = 7;      19: Depth = 6;      20: Depth = 6;      21: Depth = 6;      22: Depth = 5;      23: Depth = 4;      24: Depth = 4;      25: Depth = 4;      26: Depth = 3;      27: Depth = 3;      28: Depth = 2;      29: Depth = 2;      30: Depth = 2;      default: Depth = 1;    endcase    case(Depth)      1:      begin	if (l == 0)	begin	  m = 0 ;	  n = 0 ;	  QQ[0] = PP[0];	end	else	begin	  QQ[m] = PP[n];	end	m = m + 1;	n = n + 1;      end      2:      begin	QQ[m] = PP[n] ^ PP[n+1];	QQ[m+1] = PP[n] & PP[n+1];	m = m + 2;	n = n + 2;      end      3:      begin	QQ[m] = PP[n] ^ PP[n+1] ^ PP[n+2];	QQ[m+1] = (PP[n] & PP[n+1]) | (PP[n] & PP[n+2]) | (PP[n+1] & PP[n+2]);	m = m + 2;	n = n + 3;      end      4:      begin	QQ[m] = PP[n] ^ PP[n+1] ^ PP[n+2];	QQ[m+1] = PP[n+3];	QQ[m+2] = (PP[n] & PP[n+1]) | (PP[n] & PP[n+2]) | (PP[n+1] & PP[n+2]);	m = m + 3;	n = n + 4;      end      5:      begin	QQ[m] = PP[n] ^ PP[n+1] ^ PP[n+2];	QQ[m+1] = PP[n+3] ^ PP[n+4];	QQ[m+2] = (PP[n] & PP[n+1]) | (PP[n] & PP[n+2]) | (PP[n+1] & PP[n+2]);	QQ[m+3] = PP[n+3] & PP[n+4]; 	m = m + 4;	n = n + 5;      end      6:      begin	QQ[m] = PP[n] ^ PP[n+1] ^ PP[n+2];	QQ[m+1] = PP[n+3] ^ PP[n+4] ^ PP[n+5];	QQ[m+2] = (PP[n] & PP[n+1]) | (PP[n] & PP[n+2]) | (PP[n+1] & PP[n+2]);	QQ[m+3] = (PP[n+3] & PP[n+4]) | 	          (PP[n+3] & PP[n+5]) | 		  (PP[n+4] & PP[n+5]); 	m = m + 4;	n = n + 6;      end      7:      begin	QQ[m] = PP[n] ^ PP[n+1] ^ PP[n+2];	QQ[m+1] = PP[n+3] ^ PP[n+4] ^ PP[n+5];	QQ[m+2] = PP[n+6];	QQ[m+3] = (PP[n] & PP[n+1]) | (PP[n] & PP[n+2]) | (PP[n+1] & PP[n+2]);	QQ[m+4] = (PP[n+3] & PP[n+4]) | 	          (PP[n+3] & PP[n+5]) | 		  (PP[n+4] & PP[n+5]); 	m = m + 5;	n = n + 7;      end      8:      begin	QQ[m] = PP[n] ^ PP[n+1] ^ PP[n+2];	QQ[m+1] = PP[n+3] ^ PP[n+4] ^ PP[n+5];	QQ[m+2] = PP[n+6] ^ PP[n+7];	QQ[m+3] = (PP[n] & PP[n+1]) | (PP[n] & PP[n+2]) | (PP[n+1] & PP[n+2]);	QQ[m+4] = (PP[n+3] & PP[n+4]) | 	          (PP[n+3] & PP[n+5]) | 		  (PP[n+4] & PP[n+5]); 	QQ[m+5] = PP[n+6] & PP[n+7];	m = m + 6;	n = n + 8;      end      default:      begin	QQ = PP;	Depth = 0;	m = 0;	n = 0;      end    endcase  endendendmodule