#include "arch.h"#include "mcfuart.h"char	ident[] = "Airlib BLAB";char	copyright[] = "(c) Airlib Inc & Embedded CL";extern unsigned long consoleBase;void configureConsole(){	consoleBase = MCFUART_BASE1;	configureSerial(consoleBase, 9600, 40000000);}void configureAuxSerial() { }void setLED(int state){	*((volatile unsigned char *) (0x100001C9)) = (unsigned char)(state<<3);}extern unsigned int downloadPort;extern unsigned int image_size;extern unsigned char *xfer_addr;extern unsigned char *down_addr;extern unsigned char *dest_addr;extern unsigned char *source_addr;void setImageParams(){	downloadPort = 1;	image_size  = 0x1c0000;	xfer_addr   = (unsigned char *)0x00000000;	down_addr   = (unsigned char *)0xffe04000;	dest_addr   = (unsigned char *)0x00000000;	source_addr = (unsigned char *)0xffe04000;}void setupBoard(){	volatile unsigned char	*mbar;	mbar = (volatile unsigned char *) MCF_MBAR;	setLED(0);	/*	 *	Setup chip selects...	 */	/* CS0 -- FLASH ROM */	*((volatile unsigned short *) (mbar + MCFSIM_CSAR0)) = 0xffe0;	*((volatile unsigned long *) (mbar + MCFSIM_CSMR0)) = 0x001f0000;	// *((volatile unsigned short *) (mbar + MCFSIM_CSCR0)) = 0x0983;	*((volatile unsigned short *) (mbar + MCFSIM_CSCR0)) = 0x099f;	/* CS1 -- Xilinx */	*((volatile unsigned short *) (mbar + MCFSIM_CSAR1)) = 0xd000;	*((volatile unsigned long *) (mbar + MCFSIM_CSMR1)) = 0x001f0000;	*((volatile unsigned short *) (mbar + MCFSIM_CSCR1)) = 0x0143;	/* CS2 -- not used */	*((volatile unsigned short *) (mbar + MCFSIM_CSAR2)) = 0x0000;	*((volatile unsigned long *) (mbar + MCFSIM_CSMR2)) = 0x00000000;	*((volatile unsigned short *) (mbar + MCFSIM_CSCR2)) = 0x0000;	/* CS3 -- not used */	*((volatile unsigned short *) (mbar + MCFSIM_CSAR3)) = 0x0000;	*((volatile unsigned long *) (mbar + MCFSIM_CSMR3)) = 0x00000000;	*((volatile unsigned short *) (mbar + MCFSIM_CSCR3)) = 0x0000;	/* CS4 -- Not used */	*((volatile unsigned short *) (mbar + MCFSIM_CSAR4)) = 0x0000;	*((volatile unsigned long *) (mbar + MCFSIM_CSMR4)) = 0x00000000;	*((volatile unsigned short *) (mbar + MCFSIM_CSCR4)) = 0x0000;	/* CS5 -- Not used */	*((volatile unsigned short *) (mbar + MCFSIM_CSAR5)) = 0x0000;	*((volatile unsigned long *) (mbar + MCFSIM_CSMR5)) = 0x00000000;	*((volatile unsigned short *) (mbar + MCFSIM_CSCR5)) = 0x0000;	/* CS6 -- Not used */	*((volatile unsigned short *) (mbar + MCFSIM_CSAR6)) = 0x0000;	*((volatile unsigned long *) (mbar + MCFSIM_CSMR6)) = 0x00000000;	*((volatile unsigned short *) (mbar + MCFSIM_CSCR6)) = 0x0000;	/* CS7 -- Not used */	*((volatile unsigned short *) (mbar + MCFSIM_CSAR7)) = 0x0000;	*((volatile unsigned long *) (mbar + MCFSIM_CSMR7)) = 0x00000000;	*((volatile unsigned short *) (mbar + MCFSIM_CSCR7)) = 0x0000;}void setupDRAM(){	volatile unsigned char *mbar = (unsigned char *)MCF_MBAR;	/*		DCTR definition:     <15>: DAEM, 1 = Drive Multiplexed Address During External Master DRAM xfer     <14>: EDO,  1 = EDO, 0 = Normal     <12>: RCD,  1 = 2 clk RAS-to-CAS, 0 = 1.0 clk RAS-to-CAS  <10:09>: RSH,  10 = 3.5 clk RAS low, 01 = 2.5 clk, 00 = 1.5 clk  <06:05>: RP,   10 = 3.5 clk RAS Precharge, 01 = 2.5 clk, 00 = 1.5 clk     <03>: CAS,  1 = 2.5 clk CAS assertion, 0 = 1.5 clk     <01>: CP,   1 = 1.5 CAS clk precharge, 0 = .5 clk     <00>: CSR,  1 = 2.0 clk CAS before RAS setup, 0 = 1.0 clk	*/	*((volatile unsigned short *) (mbar + MCFSIM_DCRR)) = 0x0027;	*((volatile unsigned short *) (mbar + MCFSIM_DCTR)) = 0x544B;	*((volatile unsigned short *) (mbar + MCFSIM_DCAR0)) = 0x0000;#ifdef CONFIG_RAM_16MB	*((volatile unsigned long *) (mbar + MCFSIM_DCMR0)) = 0x00fe0000;#else	*((volatile unsigned long *) (mbar + MCFSIM_DCMR0)) = 0x003e0000;#endif	*((volatile unsigned char *) (mbar + MCFSIM_DCCR0)) = 0x13;	*((volatile unsigned short *) (mbar + MCFSIM_DCAR1)) = 0x0000;	*((volatile unsigned long *) (mbar + MCFSIM_DCMR1)) = 0x00000000;	*((volatile unsigned char *) (mbar + MCFSIM_DCCR1)) = 0x00;	// Dummy write to start SDRAM	// *((volatile unsigned long *)0) = 0;}