#include "arch.h"#include "mcfuart.h"char	ident[] = "Motorola 5272 C3";char	copyright[] = "(C) 1999, Moreton Bay Ventures, Rob Scott, Roland Seuhs\n(C) 2001 Key Technology, Travis Griggs, Ken Treis";extern unsigned int downloadPort;extern unsigned int image_size;extern unsigned char *xfer_addr;extern unsigned char *down_addr;extern unsigned char *dest_addr;extern unsigned char *source_addr;extern unsigned long consoleBase;void configureConsole(){	consoleBase = MCFUART_BASE1;	configureSerial(consoleBase, 19200, MCF_CLK);}void configureAuxSerial(){	configureSerial(MCFUART_BASE2, 115200, MCF_CLK);}void setLED() {};void setImageParams(){	downloadPort = 1;	image_size = 0x00080000;	source_addr = (unsigned char *)0xfff40000;	down_addr = (unsigned char *)0xfff40000;	xfer_addr = (unsigned char *)0x20000;	dest_addr = (unsigned char *)0x20000;}void setupBoard(){	volatile unsigned char	*mbar;	mbar = (volatile unsigned char *) MCF_MBAR;	// stuff that was added for dbug compliance (sim_init)	mbar_writeShort(MCFSIM_SCR, 0x0003);	mbar_writeShort(MCFSIM_SPR, 0xFFFF);	mbar_writeLong(MCFSIM_ICR1, 0x88888888);	mbar_writeLong(MCFSIM_ICR2, 0x88888888);	mbar_writeLong(MCFSIM_ICR3, 0x88888888);	mbar_writeLong(MCFSIM_ICR4, 0x88880000);	mbar_writeLong(MCFSIM_PITR, 0x00000000);	mbar_writeByte(MCFSIM_PIVR, 0x00000040);	mbar_writeLong(MCFSIM_PACNT, 0x00000000);	// more stuff from dbug (gpio_init)	mbar_writeShort(MCFSIM_PADDR, 0x0000);	mbar_writeLong(MCFSIM_PBCNT, 0x55554155);	// PBCNT allows the console to work	mbar_writeShort(MCFSIM_PBDDR, 0x0000);	mbar_writeLong(MCFSIM_PDCNT, 0x00000000);	// CS0: FLASH	mbar_writeLong(MCFSIM_CSBR0, 0xF0000201);	mbar_writeLong(MCFSIM_CSOR0, 0xFFE00014);	// CS2: External 512K SRAM -- may or may not be there	mbar_writeLong(MCFSIM_CSBR2, 0x30000001);	mbar_writeLong(MCFSIM_CSOR2, 0xFFF80000);	// CS7: SDRAM	// Match = 0x003xxxxx, SDRAM = 0x400, Cache Line = 0x300, Enable = 1	mbar_writeLong(MCFSIM_CSBR7, 0x00000701);	mbar_writeLong(MCFSIM_CSOR7, 0xFFC0007C); 		// CS1, CS3, CS4, CS5, and CS6 are unused on the M5272C3.	mbar_writeLong(MCFSIM_CSBR1, 0);	mbar_writeLong(MCFSIM_CSOR1, 0);	mbar_writeLong(MCFSIM_CSBR3, 0);	mbar_writeLong(MCFSIM_CSOR3, 0);	mbar_writeLong(MCFSIM_CSBR4, 0);	mbar_writeLong(MCFSIM_CSOR4, 0);	mbar_writeLong(MCFSIM_CSBR5, 0);	mbar_writeLong(MCFSIM_CSOR5, 0);	mbar_writeLong(MCFSIM_CSBR6, 0);	mbar_writeLong(MCFSIM_CSOR6, 0);}void setupDRAM(){	volatile unsigned char *mbar = (unsigned char *)MCF_MBAR;	mbar_writeLong(MCFSIM_SDTR, 0xF539);	mbar_writeLong(MCFSIM_SDCR, 0x4211);	// Dummy write to start SDRAM	*((volatile unsigned long *)0) = 0;}