;******************************************************************************
;   MSP-FET430P140 Demo - Timer_B PWM TB1-2 up-down mode, DCO SMCLK
;
;   Description; This program will generate two PWM outputs on P4.1/4.2 using
;   Timer_B in up-down mode.  The value in CCR0, 128, defines the period/2 and the 
;   values in CCR1 and CCR1 the duty PWM cycles.  Using ~ 800kHz SMCLK as TBCLK,
;   the timer period is ~ 320us with a 75% duty cycle on P4.1 and 25% on P4.2. 
;   SMCLK = MCLK = TBCLK = default DCO ~ 800kHz. 
;
;                MSP430F149
;             -----------------
;         /|\|              XIN|-  
;          | |                 |
;          --|RST          XOUT|-
;            |                 |
;            |             P4.1|--> CCR1 - 75% PWM
;            |             P4.2|--> CCR2 - 25% PWM
;
;   M.Buccini
;   Texas Instruments, Inc
;   June 2004
;******************************************************************************
#include  "msp430x14x.h"
;----------------------------------------------------------------------------- 
            ORG     01100h                  ; Program Start
;----------------------------------------------------------------------------- 
RESET       mov.w   #0A00h,SP               ; Initialize 'x1x9 stackpointer
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
SetupP4     bis.b   #006h,&P4DIR            ; P4.1 and P4.2 output
            bis.b   #006h,&P4SEL            ; P4.1 and P4.2 TB1/2 otions
SetupC0     mov.w   #128,&TBCCR0            ; PWM Period/2 
SetupC1     mov.w   #OUTMOD_6,&TBCCTL1      ; CCR1 toggle/set
            mov.w   #32,&TBCCR1             ; CCR1 PWM Duty Cycle	  
SetupC2     mov.w   #OUTMOD_6,&TBCCTL2      ; CCR2 toggle/set
            mov.w   #96,&TBCCR2             ; CCR2 PWM duty cycle	  
SetupTB     mov.w   #TBSSEL_2+MC_3,&TBCTL   ; SMCLK, updown mode
                                            ;					  
Mainloop    bis.w   #CPUOFF,SR              ; CPU off
            nop                             ; Required only for debugger
                                            ;
;------------------------------------------------------------------------------ 
;           Interrupt Vectors Used MSP430x13x/14x/15x/16x         
;------------------------------------------------------------------------------ 
            ORG     0FFFEh                  ; MSP430 RESET Vector
            DW      RESET                   ; 
            END