;******************************************************************************
;   MSP-FET430P140 Demo - Timer_B PWM TB1-6 upmode, DCO SMCLK
;
;   Description; This program will generate PWM outputs on P4.x using
;   Timer_B in upmode.  The value in CCR0, defines the period and the 
;   values in CCR1-CCR6 the duty PWM cycles.  Using ~ 800kHz SMCLK as TBCLK,
;   the timer period is ~ 640us. 
;   ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO ~ 800kHz. 
;
;                MSP430F149
;             -----------------
;         /|\|              XIN|-  
;          | |                 |
;          --|RST          XOUT|-
;            |                 |
;            |             P4.1|--> CCR1 - 75% PWM
;            |             P4.2|--> CCR2 - 25% PWM
;            |             P4.3|--> CCR3 - 12.5% PWM
;            |             P4.4|--> CCR4 - 6.25% PWM
;            |             P4.5|--> CCR5 - 3.125% PWM
;            |             P4.6|--> CCR6 - 1.5625% PWM
;
;   M.Buccini
;   Texas Instruments, Inc
;   June 2004
;******************************************************************************
#include  "msp430x14x.h"
;------------------------------------------------------------------------------ 
            ORG     01100h                  ; Program Start
;------------------------------------------------------------------------------ 
RESET       mov.w   #0A00h,SP               ; Initialize 'x1x9 stackpointer
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
SetupP4     bis.b   #007Eh,&P4DIR           ; P4.1-P4.6 output
            bis.b   #007Eh,&P4SEL           ; P4.1-P4.6 TB1-6 otions
SetupC0     mov.w   #512-1,&TBCCR0          ; PWM Period 
SetupC1     mov.w   #OUTMOD_7,&TBCCTL1      ; CCR1 reset/set
            mov.w   #384,&TBCCR1            ; CCR1 PWM Duty Cycle	  
SetupC2     mov.w   #OUTMOD_7,&TBCCTL2      ; CCR2 reset/set
            mov.w   #192,&TBCCR2            ; CCR2 PWM duty cycle	  
SetupC3     mov.w   #OUTMOD_7,&TBCCTL3      ; CCR3 reset/set
            mov.w   #96,&TBCCR3             ; CCR3 PWM duty cycle	  
SetupC4     mov.w   #OUTMOD_7,&TBCCTL4      ; CCR4 reset/set
            mov.w   #48,&TBCCR4             ; CCR4 PWM duty cycle	  
SetupC5     mov.w   #OUTMOD_7,&TBCCTL5      ; CCR5 reset/set
            mov.w   #24,&TBCCR5             ; CCR5 PWM duty cycle	  
SetupC6     mov.w   #OUTMOD_7,&TBCCTL6      ; CCR6 reset/set
            mov.w   #12,&TBCCR6             ; CCR6 PWM duty cycle	  
SetupTB     mov.w   #TBSSEL_2+MC_1,&TBCTL   ; SMCLK, upmode
                                            ;					  
Mainloop    bis.w   #CPUOFF,SR              ; CPU off
            nop                             ; Required only for debugger
                                            ;
;------------------------------------------------------------------------------ 
;           Interrupt Vectors Used MSP430x13x/14x/15x/16x         
;------------------------------------------------------------------------------ 
            ORG     0FFFEh                  ; MSP430 RESET Vector
            DW      RESET                   ; 
            END