027F: 62 D0 00 MOV   REG[208],0
(0098) 	mov	reg[d2h], 10h		; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU)
    0282: 62 D2 10 MOV   REG[210],16
(0099) 	mov	reg[e1h], 00h		; OscillatorControl_1 register (OSC_CR1)
    0285: 62 E1 00 MOV   REG[225],0
(0100) 	mov	reg[e2h], 00h		; OscillatorControl_2 register (OSC_CR2)
    0288: 62 E2 00 MOV   REG[226],0
(0101) 	mov	reg[dfh], 00h		; OscillatorControl_3 register (OSC_CR3)
    028B: 62 DF 00 MOV   REG[223],0
(0102) 	mov	reg[deh], 00h		; OscillatorControl_4 register (OSC_CR4)
    028E: 62 DE 00 MOV   REG[222],0
(0103) 	mov	reg[ddh], 00h		; OscillatorGlobalBusEnableControl register (OSC_GO_EN)
    0291: 62 DD 00 MOV   REG[221],0
(0104) 	mov	reg[d8h], ffh		; Port_0_MUXBusCtrl register (MUX_CR0)
    0294: 62 D8 FF MOV   REG[216],255
(0105) 	mov	reg[d9h], 54h		; Port_1_MUXBusCtrl register (MUX_CR1)
    0297: 62 D9 54 MOV   REG[217],84
(0106) 	mov	reg[dah], 00h		; Port_2_MUXBusCtrl register (MUX_CR2)
    029A: 62 DA 00 MOV   REG[218],0
(0107) 	mov	reg[dbh], 00h		; Port_3_MUXBusCtrl register (MUX_CR3)
    029D: 62 DB 00 MOV   REG[219],0
(0108) ;  Instance name CSR_1, User Module CSR
(0109) ;       Instance name CSR_1, Block Name CMP(ACE00)
(0110) ;       Instance name CSR_1, Block Name Counter16_LSB(DBB01)
(0111) 	mov	reg[24h], 01h		;CSR_1_CTR_FUNC_LSB_REG(DBB01FN)
    02A0: 62 24 01 MOV   REG[36],1
(0112) 	mov	reg[25h], 8ch		;CSR_1_CTR_INPUT_LSB_REG(DBB01IN)
    02A3: 62 25 8C MOV   REG[37],140
(0113) 	mov	reg[26h], 00h		;CSR_1_CTR_OUTPUT_LSB_REG(DBB01OU)
    02A6: 62 26 00 MOV   REG[38],0
(0114) ;       Instance name CSR_1, Block Name Counter16_MSB(DCB02)
(0115) 	mov	reg[28h], 21h		;CSR_1_CTR_FUNC_MSB_REG(DCB02FN)
    02A9: 62 28 21 MOV   REG[40],33
(0116) 	mov	reg[29h], 3ch		;CSR_1_CTR_INPUT_MSB_REG(DCB02IN)
    02AC: 62 29 3C MOV   REG[41],60
(0117) 	mov	reg[2ah], 00h		;CSR_1_CTR_OUTPUT_MSB_REG(DCB02OU)
    02AF: 62 2A 00 MOV   REG[42],0
(0118) ;       Instance name CSR_1, Block Name PWM(DBB00)
(0119) 	mov	reg[20h], 21h		;CSR_1_PWM_FUNC_REG(DBB00FN)
    02B2: 62 20 21 MOV   REG[32],33
(0120) 	mov	reg[21h], 11h		;CSR_1_PWM_IN_REG(DBB00IN)
    02B5: 62 21 11 MOV   REG[33],17
(0121) 	mov	reg[22h], 44h		;CSR_1_PWM_OUT_REG(DBB00OU)
    02B8: 62 22 44 MOV   REG[34],68
(0122) ;  Instance name LCD_1, User Module LCD
(0123) 	M8C_SetBank0
    02BB: 70 EF    AND   F,239
(0124) 	ret
    02BD: 7F       RET   
FILE: lib\psocconfig.asm
(0001) ; Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
(0002) ;
(0003) ;==========================================================================
(0004) ;  PSoCConfig.asm
(0005) ;  @PSOC_VERSION
(0006) ;
(0007) ;  Version: 0.85
(0008) ;  Revised: June 22, 2004
(0009) ;  Copyright Cypress MicroSystems 2000-2004. All Rights Reserved.
(0010) ;
(0011) ;  This file is generated by the Device Editor on Application Generation.
(0012) ;  It contains code which loads the configuration data table generated in
(0013) ;  the file PSoCConfigTBL.asm
(0014) ;
(0015) ;  DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
(0016) ;  Edits to this file will not be preserved.
(0017) ;==========================================================================
(0018) ;
(0019) include "m8c.inc"
(0020) include "memory.inc"
(0021) include "GlobalParams.inc"
(0022) 
(0023) export LoadConfigInit
(0024) export _LoadConfigInit
(0025) export LoadConfig_test8key3
(0026) export _LoadConfig_test8key3
(0027) export Port_0_Data_SHADE
(0028) export _Port_0_Data_SHADE
(0029) export Port_1_Data_SHADE
(0030) export _Port_1_Data_SHADE
(0031) export Port_2_Data_SHADE
(0032) export _Port_2_Data_SHADE
(0033) export Port_2_DriveMode_0_SHADE
(0034) export _Port_2_DriveMode_0_SHADE
(0035) export Port_2_DriveMode_1_SHADE
(0036) export _Port_2_DriveMode_1_SHADE
(0037) 
(0038) 
(0039) export NO_SHADOW
(0040) export _NO_SHADOW
(0041) 
(0042) FLAG_CFG_MASK:      equ 10h         ;M8C flag register REG address bit mask
(0043) END_CONFIG_TABLE:   equ ffh         ;end of config table indicator
(0044) 
(0045) AREA psoc_config(rom, rel)
(0046) 
(0047) 
(0048) ;---------------------------------------------------------------------------
(0049) ; LoadConfigInit - Establish the start-up configuration (except for a few
(0050) ;                  parameters handled by boot code, like CPU speed). This
(0051) ;                  function can be called from user code, but typically it
(0052) ;                  is only called from boot.
(0053) ;
(0054) ;       INPUTS: None.
(0055) ;      RETURNS: Nothing.
(0056) ; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified!
(0057) ;               In the large memory model currently only the page
(0058) ;               pointer registers listed below are modified.  This does
(0059) ;               not guarantee that in future implementations of this
(0060) ;               function other page pointer registers will not be
(0061) ;               modified.
(0062) ;          
(0063) ;               Page Pointer Registers Modified: 
(0064) ;               CUR_PP
(0065) ;
(0066) _LoadConfigInit:
(0067)  LoadConfigInit:
(0068)     RAM_PROLOGUE RAM_USE_CLASS_4
(0069)     
(0070) 	mov		[Port_0_Data_SHADE], 0h
    02BE: 55 00 00 MOV   [0],0
(0071) 	mov		[Port_1_Data_SHADE], 0h
    02C1: 55 01 00 MOV   [1],0
(0072) 	mov		[Port_2_Data_SHADE], 0h
    02C4: 55 02 00 MOV   [2],0
(0073) 	mov		[Port_2_DriveMode_0_SHADE], 7fh
    02C7: 55 03 7F MOV   [3],127
(0074) 	mov		[Port_2_DriveMode_1_SHADE], 80h
    02CA: 55 04 80 MOV   [4],128
(0075) 
(0076) 	lcall	LoadConfig_test8key3
    02CD: 7C 02 D1 LCALL 0x02D1
(0077) 
(0078)     RAM_EPILOGUE RAM_USE_CLASS_4
(0079)     ret
    02D0: 7F       RET   
(0080) 
(0081) ;---------------------------------------------------------------------------
(0082) ; Load Configuration test8key3
(0083) ;
(0084) ;    Load configuration registers for test8key3.
(0085) ;    IO Bank 0 registers a loaded first,then those in IO Bank 1.
(0086) ;
(0087) ;       INPUTS: None.
(0088) ;      RETURNS: Nothing.
(0089) ; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be
(0090) ;               modified as may the Page Pointer registers!
(0091) ;               In the large memory model currently only the page
(0092) ;               pointer registers listed below are modified.  This does
(0093) ;               not guarantee that in future implementations of this
(0094) ;               function other page pointer registers will not be
(0095) ;               modified.
(0096) ;          
(0097) ;               Page Pointer Registers Modified: 
(0098) ;               CUR_PP
(0099) ;
(0100) _LoadConfig_test8key3:
(0101)  LoadConfig_test8key3:
(0102)     RAM_PROLOGUE RAM_USE_CLASS_4
(0103)     lcall   LoadConfigTBL_test8key3            ; Call load config table routine
    02D1: 7C 01 A1 LCALL 0x01A1
(0104) 
(0105) 
(0106)     RAM_EPILOGUE RAM_USE_CLASS_4
(0107)     ret
    02D4: 7F       RET   
FILE: lib\lcd_1.asm
(0001) ;;*****************************************************************************
(0002) ;;*****************************************************************************
(0003) ;;  FILENAME:   LCD_1.asm
(0004) ;;  Version: 1.4, Updated on 2005/09/30 at 10:52:22
(0005) ;;  Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
(0006) ;;
(0007) ;;  DESCRIPTION: LCD User Module software implementation file
(0008) ;;               for 22/24/25/26/27xxx PSoC family of devices.
(0009) ;;
(0010) ;; This set of functions is written for the common 2 and 4 line
(0011) ;; LCDs that use the Hitachi HD44780A controller.
(0012) ;;
(0013) ;;  LCD connections to PSoC port
(0014) ;;
(0015) ;;    PX.0 ==> LCD D4
(0016) ;;    PX.1 ==> LCD D5
(0017) ;;    PX.2 ==> LCD D6
(0018) ;;    PX.3 ==> LCD D7
(0019) ;;    PX.4 ==> LCD E
(0020) ;;    PX.5 ==> LCD RS
(0021) ;;    PX.6 ==> LCD R/W
(0022) ;;
(0023) ;;  NOTE: User Module APIs conform to the fastcall16 convention for marshalling
(0024) ;;        arguments and observe the associated "Registers are volatile" policy.
(0025) ;;        This means it is the caller's responsibility to preserve any values
(0026) ;;        in the X and A registers that are still needed after the API functions
(0027) ;;        returns. For Large Memory Model devices it is also the caller's 
(0028) ;;        responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and 
(0029) ;;        MVW_PP registers. Even though some of these registers may not be modified
(0030) ;;        now, there is no guarantee that will remain the case in future releases.
(0031) ;;-----------------------------------------------------------------------------
(0032) ;;  Copyright (c) Cypress MicroSystems 2001-2003. All Rights Reserved.
(0033) ;;*****************************************************************************
(0034) ;;*****************************************************************************
(0035) 
(0036) include "m8c.inc"
(0037) include "memory.inc"
(0038) include "LCD_1.inc"
(0039) 
(0040) ;-----------------------------------------------
(0041) ;  Global Symbols
(0042) ;-----------------------------------------------
(0043) 
(0044) export   LCD_1_Start
(0045) export  _LCD_1_Start
(0046) export   LCD_1_Init
(0047) export  _LCD_1_Init
(0048) 
(0049) export   LCD_1_WriteData
(0050) export  _LCD_1_WriteData
(0051) 
(0052) export   LCD_1_Control
(0053) export  _LCD_1_Control
(0054) 
(0055) export  LCD_1_PrString
(0056) export _LCD_1_PrString
(0057) 
(0058) export  LCD_1_PrCString
(0059) export _LCD_1_PrCString
(0060) 
(0061) export  LCD_1_Position
(0062) export _LCD_1_Position
(0063) 
(0064) export  LCD_1_PrHexByte
(0065) export _LCD_1_PrHexByte
(0066) 
(0067) export  LCD_1_PrHexInt
(0068) export _LCD_1_PrHexInt
(0069) 
(0070) export  LCD_1_Delay50uTimes
(0071) export _LCD_1_Delay50uTimes
(0072) 
(0073) export  LCD_1_Delay50u
(0074) export _LCD_1_Delay50u
(0075) 
(0076) ;-----------------------------------------------
(0077) ; If bargraph functions not required, don't
(0078) ; export the function names.
(0079) ;-----------------------------------------------
(0080) 
(0081) IF (LCD_1_BARGRAPH_ENABLE)
(0082) export  LCD_1_InitBG
(0083) export _LCD_1_InitBG
(0084) 
(0085) export  LCD_1_InitVBG
(0086) export _LCD_1_InitVBG
(0087) 
(0088) ; NOTE: The two functions,
(0089) ;
(0090) ;    LCD_1_DrawVBG and
(0091) ;    LCD_1_DrawBG
(0092) ;
(0093) ; are implemented using both fastcall16 and legacy fastcall16 because they
(0094) ; fall into a special and rare case where the calling sequences specified
(0095) ; by the two disciplines are incompatible. The fastcall16 versions are
(0096) ; provided for both C and Assembly users in all memory models. The legacy
(0097) ; fastcall16 versions are provided only to support existing small memory
(0098) ; model assembly language code---they do not work in the large memory
(0099) ; model.
(0100) ;
(0101) ; ** The legacy fastcall16 versions are provided on a temporary basis to
(0102) ; ** ease the transition to the 4.2 release of PSoC Designer. Their use is
(0103) ; ** deprecated and thier status is "No Further Maintenance".
(0104) ;
(0105) ; The fastcall16 versions of these functions are distinguished by a
(0106) ; leading underscore in the name. The legacy fastcall16 names (which appear
(0107) ; in this comment) do not have the leading underscore. Details on the
(0108) ; calling sequence to be used for fastcall16 are given in the user module
(0109) ; datasheet.
(0110) ;
(0111) ; Fastcall16 versions:
(0112) export _LCD_1_DrawVBG
(0113) export _LCD_1_DrawBG
(0114) 
(0115) IF SYSTEM_SMALL_MEMORY_MODEL
(0116) ; Legacy Fastcall versions:
(0117) export  LCD_1_DrawVBG
(0118) export  LCD_1_DrawBG
(0119) ENDIF  ; SYSTEM_SMALL_MEMORY_MODEL
(0120) 
(0121) ENDIF  ; BARGRAPH_ENABLE
(0122) 
(0123) ;
(0124) ; The following functions are deprecated and will be eliminated in a future
(0125) ; version of PSoC Designer.
(0126) ;
(0127) export   LCD_1_Write_Data
(0128) export  _LCD_1_Write_Data
(0129) 
(0130) 
(0131) ;-----------------------------------------------
(0132) ;  EQUATES
(0133) ;-----------------------------------------------
(0134) LCD_E:              equ    10h
(0135) LCD_RW:             equ    40h
(0136) LCD_RS:             equ    20h
(0137) 
(0138) LCD_DATA_MASK:      equ    0Fh
(0139) LCD_READY_BIT:      equ    08h
(0140) 
(0141) LCD_DATA_READ:      equ    ( LCD_E | LCD_RW | LCD_RS )
(0142) LCD_CNTL_READ:      equ    ( LCD_E | LCD_RW )
(0143) LCD_PORT_WRITE:     equ    7Fh
(0144) LCD_PORT_MASK:      equ    7Fh
(0145) 
(0146) LCD_Port:           equ    PRT2DR
(0147) LCD_PortMode0:      equ    PRT2DM0
(0148) LCD_PortMode1:      equ    PRT2DM1
(0149) 
(0150) DISP_INC:           equ    03h
(0151) DISP_OFF:           equ    08h
(0152) DISP_ON:            equ    0Ch
(0153) LCD_4BIT_2LINE:     equ    2Ch
(0154)