?? csr_1int.asm
字號:
;;*****************************************************************************
;;*****************************************************************************
;; FILENAME: CSR_1INT.asm
;; Version: 1.1, Updated on 2005/10/13 at 09:13:22
;; Generated by PSoC Designer ver 4.2 b1013 : 02 September, 2004
;;
;; DESCRIPTION: CSR_1 User Module ISR implementation file for the
;; 21xxx PSoC family of devices.
;;-----------------------------------------------------------------------------
;; Copyright (c) Cypress MicroSystems 2000-2005. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************
include "m8c.inc"
include "memory.inc"
include "CSR_1.inc"
MSB: equ 0
LSB: equ 1
;-----------------------------------------------
; Global Symbols
;-----------------------------------------------
export _CSR_1_SCAN_ISR
;-----------------------------------------------------------------------------
; FUNCTION NAME: CSR_1_CAPTURE_ISR
;
; DESCRIPTION:
; Interrupt Service Routine for the 16 bit counter in the CSR. If the interrupt
; is enabled and the comparator trips or the counter reaches terminal count (as
; selected by user parameter) the code execution will vector to this ISR.
;
;-----------------------------------------------------------------------------
;
;
_CSR_1_SCAN_ISR:
CSR_1_Stop_CMP_M ; Disable power of comparator
CSR_1_Stop_M ; Stop PWM, then counter
push A
push X
mov A, [CSR_1_bSwitchNum] ; Get Counter Counter value
asl A
mov X,A
mov A, reg[CSR_1_CTR_COUNTER_LSB_REG] ; Dummy Read
mov A, reg[CSR_1_CTR_COMPARE_LSB_REG] ; Get Counter LSB
mov [X+(CSR_1_iaSwResult+LSB)],A
mov A, reg[CSR_1_CTR_COUNTER_MSB_REG] ; Dummy Read
mov A, reg[CSR_1_CTR_COMPARE_MSB_REG] ; Get Counter MSB
mov [X+(CSR_1_iaSwResult+MSB)],A
; Reset Counter period to 0xFFFF
mov reg[CSR_1_CTR_PERIOD_LSB_REG], 0xFF
mov reg[CSR_1_CTR_PERIOD_MSB_REG], 0xFF
; Subtract result from 0xFFFF
mov A,0xFF
sub A,[X+(CSR_1_iaSwResult+LSB)]
mov [X+(CSR_1_iaSwResult+LSB)],A
mov A,0xFF
sbb A,[X+(CSR_1_iaSwResult+MSB)]
mov [X+(CSR_1_iaSwResult+MSB)],A
; Disconnect the switch (place in reset state)
mov A,[CSR_1_bSwitchNum]
lcall CSR_1_iGetPortPin ; Get switch port and mask
lcall CSR_1_DisableSwitch ; Enable first switch
; Determine if scanning should continue
; If still in scan mode select next switch to scan
inc [CSR_1_bSwitchNum] ; Advance to next switch
mov A, [CSR_1_bScanEnd] ; Check to see if it is out of range
cmp A,[CSR_1_bSwitchNum] ; Move new value to A
jnc .KeepScanning ; Not end of scan list yet
; At end of scan list, determine if this is a one time scan or continuous
or [CSR_1_bfStatus],CSR_1_SCAN_SET_COMPLETE ; Set Scan complete flag
tst [CSR_1_bfStatus],CSR_1_SCAN_CONTINUOUS ; Continuous scan mode?
jz .STOP_SCANNING ; Stop scanning
.TAKE_IT_FROM_TOP:
mov [CSR_1_bSwitchNum],[CSR_1_bScanStart] ; Reset scan at top of list.
.KeepScanning:
mov A, [CSR_1_bPWMPeriod]
mov reg[CSR_1_PWM_PERIOD_REG], A ; Set PWM period
CSR_1_Start_M ; Start counter and scan pwm
mov A,[CSR_1_bSwitchNum] ; Enable the next switch
lcall CSR_1_iGetPortPin ; Get switch port and mask
lcall CSR_1_EnableSwitch ; Enable first switch
jmp .END_SCAN_ISR
.STOP_SCANNING:
and [CSR_1_bfStatus],~(CSR_1_SCAN_ACTIVE|CSR_1_SCAN_CONTINUOUS) ; Clear scan active flag
CSR_1_Stop_M ; Disable counter and scan PWM
CSR_1_Stop_CMP_M ; Disable power of comparator
CSR_1_DisableInt_M ; Disable scan PWM interrupt
.END_SCAN_ISR:
pop X
pop A
.SCAN_RETURN:
;@PSoC_UserCode_BODY_TERMINAL@ (Do not change this line.)
;---------------------------------------------------
; Insert your custom code below this banner
;---------------------------------------------------
; NOTE: interrupt service routines must preserve
; the values of the A and X CPU registers.
;---------------------------------------------------
; Insert your custom code above this banner
;---------------------------------------------------
;@PSoC_UserCode_END@ (Do not change this line.)
reti
; End of File CSR_1INT.asm
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