/***************************************************
模塊說明      :TLV320AIC23模塊頭文件
作    者      :柳軍勝
公    司      :杭州自由電子科技
            :http://www.freefpga.com
電   話       :0571-85084089
修    改      :
日期時間      :20060523
說    明      :TLV320AIC23控制寄存器地址以及位定義
****************************************************/

#ifndef _TLV320AIC23_H_
#define _TLV320AIC23_H_

#include <io.h>

#define AIC23_LIV    0x00 /* left line input channel volume control */
#define AIC23_LIV_LIV0_MSK   (0x01)
#define AIC23_LIV_LIV0_OFST  (0)
#define AIC23_LIV_LIV1_MSK   (0x02)
#define AIC23_LIV_LIV1_OFST  (1)
#define AIC23_LIV_LIV2_MSK   (0x04)
#define AIC23_LIV_LIV2_OFST  (2)
#define AIC23_LIV_LIV3_MSK   (0x08)
#define AIC23_LIV_LIV3_OFST  (3)
#define AIC23_LIV_LIV4_MSK   (0x10)
#define AIC23_LIV_LIV4_OFST  (4)
#define AIC23_LIV_LIM_MSK   (0x80)
#define AIC23_LIV_LIM_OFST  (7)
#define AIC23_LIV_LRS_MSK   (0x100)
#define AIC23_LIV_LRS_OFST  (8)  

#define AIC23_RIV     0x01 /* right line input channel volume control */
#define AIC23_RIV_RIV0_MSK   (0x01)
#define AIC23_RIV_RIV0_OFST  (0)
#define AIC23_RIV_RIV1_MSK   (0x02)
#define AIC23_RIV_RIV1_OFST  (1)
#define AIC23_RIV_RIV2_MSK   (0x04)
#define AIC23_RIV_RIV2_OFST  (2)
#define AIC23_RIV_RIV3_MSK   (0x08)
#define AIC23_RIV_RIV3_OFST  (3)
#define AIC23_RIV_RIV4_MSK   (0x10)
#define AIC23_RIV_RIV4_OFST  (4)
#define AIC23_RIV_RIM_MSK   (0x80)
#define AIC23_RIV_RIM_OFST  (7)
#define AIC23_RIV_RLS_MSK   (0x100)
#define AIC23_RIV_RLS_OFST  (8)  

#define AIC23_LHPV    0x02 /* left channel headphone volume control */
#define AIC23_LHPV_LHV0_MSK   (0x01)
#define AIC23_LHPV_LHV0_OFST  (0)
#define AIC23_LHPV_LHV1_MSK   (0x02)
#define AIC23_LHPV_LHV1_OFST  (1)
#define AIC23_LHPV_LHV2_MSK   (0x04)
#define AIC23_LHPV_LHV2_OFST  (2)
#define AIC23_LHPV_LHV3_MSK   (0x08)
#define AIC23_LHPV_LHV3_OFST  (3)
#define AIC23_LHPV_LHV4_MSK   (0x10)
#define AIC23_LHPV_LHV4_OFST  (4)
#define AIC23_LHPV_LHV5_MSK   (0x20)
#define AIC23_LHPV_LHV5_OFST  (5)
#define AIC23_LHPV_LHV6_MSK   (0x40)
#define AIC23_LHPV_LHV6_OFST  (6)
#define AIC23_LHPV_LZC_MSK   (0x80)
#define AIC23_LHPV_LZC_OFST  (7)
#define AIC23_LHPV_LRS_MSK   (0x100)
#define AIC23_LHPV_LRS_OFST  (8)

#define AIC23_RHPV    0x03 /* right channel headphone volume control */
#define AIC23_RHPV_RHV0_MSK   (0x01)
#define AIC23_RHPV_RHV0_OFST  (0)
#define AIC23_RHPV_RHV1_MSK   (0x02)
#define AIC23_RHPV_RHV1_OFST  (1)
#define AIC23_RHPV_RHV2_MSK   (0x04)
#define AIC23_RHPV_RHV2_OFST  (2)
#define AIC23_RHPV_RHV3_MSK   (0x08)
#define AIC23_RHPV_RHV3_OFST  (3)
#define AIC23_RHPV_RHV4_MSK   (0x10)
#define AIC23_RHPV_RHV4_OFST  (4)
#define AIC23_RHPV_RHV5_MSK   (0x20)
#define AIC23_RHPV_RHV5_OFST  (5)
#define AIC23_RHPV_RHV6_MSK   (0x40)
#define AIC23_RHPV_RHV6_OFST  (6)
#define AIC23_RHPV_RZC_MSK   (0x80)
#define AIC23_RHPV_RZC_OFST  (7)
#define AIC23_RHPV_RLS_MSK   (0x100)
#define AIC23_RHPV_RLS_OFST  (8)

#define AIC23_AP      0x04 /* analog audio path control */
#define AIC23_AP_MICB_MSK   (0x01)
#define AIC23_AP_MICB_OFST  (0)
#define AIC23_AP_MICM_MSK   (0x02)
#define AIC23_AP_MICM_OFST  (1)
#define AIC23_AP_INSEL_MSK   (0x04)
#define AIC23_AP_INSEL_OFST  (2)
#define AIC23_AP_BYP_MSK   (0x08)
#define AIC23_AP_BYP_OFST  (3)
#define AIC23_AP_DAC_MSK   (0x10)
#define AIC23_AP_DAC_OFST  (4)
#define AIC23_AP_SET_MSK   (0x20)
#define AIC23_AP_SET_OFST  (5)
#define AIC23_AP_STA0_MSK   (0x40)
#define AIC23_AP_STA0_OFST  (6)
#define AIC23_AP_STA1_MSK   (0x80)
#define AIC23_AP_STA1_OFST  (7)

#define AIC23_DP      0x05 /* digital audio path control */
#define AIC23_DP_ADCHP_MSK    (0x01)
#define AIC23_DP_ADCHP_OFST   (0)
#define AIC23_DP_DEEPM0_MSK   (0x02)
#define AIC23_DP_DEEPM0_OFST  (1)
#define AIC23_DP_DEEPM1_MSK   (0x04)
#define AIC23_DP_DEEPM1_OFST  (2)
#define AIC23_DP_DACM_MSK     (0x08)
#define AIC23_DP_DACM_OFST    (3)

#define AIC23_PD      0x06 /* Power down control */
#define AIC23_PD_LINE_MSK   (0x01)
#define AIC23_PD_LINE_OFST  (0)
#define AIC23_PD_MIC_MSK   (0x02)
#define AIC23_PD_MIC_OFST  (1)
#define AIC23_PD_ADC_MSK   (0x04)
#define AIC23_PD_ADC_OFST  (2)
#define AIC23_PD_DAC_MSK   (0x08)
#define AIC23_PD_DAC_OFST  (3)
#define AIC23_PD_OUT_MSK   (0x10)
#define AIC23_PD_OUT_OFST  (4)
#define AIC23_PD_OSC_MSK   (0x20)
#define AIC23_PD_OSC_OFST  (5)
#define AIC23_PD_CLK_MSK   (0x40)
#define AIC23_PD_CLK_OFST  (6)
#define AIC23_PD_OFF_MSK   (0x80)
#define AIC23_PD_OFF_OFST  (7)

#define AIC23_DIF     0x07 /* digital audio interface format */
#define AIC23_DIF_FOR0_MSK   (0x01)
#define AIC23_DIF_FOR0_OFST  (0)
#define AIC23_DIF_FOR1_MSK   (0x02)
#define AIC23_DIF_FOR1_OFST  (1)
#define AIC23_DIF_IWL0_MSK   (0x04)
#define AIC23_DIF_IWL0_OFST  (2)
#define AIC23_DIF_IWL1_MSK   (0x08)
#define AIC23_DIF_IWL1_OFST  (3)
#define AIC23_DIF_LRP_MSK   (0x10)
#define AIC23_DIF_LRP_OFST  (4)
#define AIC23_DIF_LRSWAP_MSK   (0x20)
#define AIC23_DIF_LRSWAP_OFST  (5)
#define AIC23_DIF_MS_MSK   (0x40)
#define AIC23_DIF_MS_OFST  (6)

#define AIC23_SR      0x08 /* Sample rate control */
#define AIC23_SR_USBNORMAL_MSK   (0x01)
#define AIC23_SR_USBNORMAL_OFST  (0)
#define AIC23_SR_BOSR_MSK   (0x02)
#define AIC23_SR_BOSR_OFST  (1)
#define AIC23_SR_SR0_MSK   (0x04)
#define AIC23_SR_SR0_OFST  (2)
#define AIC23_SR_SR1_MSK   (0x08)
#define AIC23_SR_SR1_OFST  (3)
#define AIC23_SR_SR2_MSK   (0x10)
#define AIC23_SR_SR2_OFST  (4)
#define AIC23_SR_SR3_MSK   (0x20)
#define AIC23_SR_SR3_OFST  (5)
#define AIC23_SR_CLKIN_MSK   (0x40)
#define AIC23_SR_CLKIN_OFST  (6)
#define AIC23_SR_CLKOUT_MSK   (0x80)
#define AIC23_SR_CLKOUT_OFST  (7)

#define AIC23_DIA     0x09 /* digital interface activation */
#define AIC23_DIA_ACT_MSK   (0x01)
#define AIC23_DIA_ACT_OFST  (0)

#define AIC23_RST     0x0f /* reset register */

#define CTRL_DATA( reg_addr , reg )  ((reg_addr<<9)|reg)

#endif //_TLV320AIC23_H_