-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--B1_NUMOUT[3] is Seg7_Dsp:inst|NUMOUT[3]
--operation mode is normal

B1_NUMOUT[3]_carry_eqn = B1L12;
B1_NUMOUT[3]_lut_out = B1_NUMOUT[3] $ (!B1_NUMOUT[3]_carry_eqn);
B1_NUMOUT[3] = DFFEAS(B1_NUMOUT[3]_lut_out, C1_QN[14], VCC, , , , , , );


--B1_NUMOUT[2] is Seg7_Dsp:inst|NUMOUT[2]
--operation mode is arithmetic

B1_NUMOUT[2]_carry_eqn = B1L91;
B1_NUMOUT[2]_lut_out = B1_NUMOUT[2] $ (B1_NUMOUT[2]_carry_eqn);
B1_NUMOUT[2] = DFFEAS(B1_NUMOUT[2]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L12 is Seg7_Dsp:inst|NUMOUT[2]~80
--operation mode is arithmetic

B1L12 = CARRY(!B1L91 # !B1_NUMOUT[2]);


--B1_NUMOUT[1] is Seg7_Dsp:inst|NUMOUT[1]
--operation mode is arithmetic

B1_NUMOUT[1]_carry_eqn = B1L71;
B1_NUMOUT[1]_lut_out = B1_NUMOUT[1] $ (!B1_NUMOUT[1]_carry_eqn);
B1_NUMOUT[1] = DFFEAS(B1_NUMOUT[1]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L91 is Seg7_Dsp:inst|NUMOUT[1]~84
--operation mode is arithmetic

B1L91 = CARRY(B1_NUMOUT[1] & (!B1L71));


--B1_NUMOUT[0] is Seg7_Dsp:inst|NUMOUT[0]
--operation mode is arithmetic

B1_NUMOUT[0]_carry_eqn = B1L41;
B1_NUMOUT[0]_lut_out = B1_NUMOUT[0] $ (B1_NUMOUT[0]_carry_eqn);
B1_NUMOUT[0] = DFFEAS(B1_NUMOUT[0]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L71 is Seg7_Dsp:inst|NUMOUT[0]~88
--operation mode is arithmetic

B1L71 = CARRY(!B1L41 # !B1_NUMOUT[0]);


--B1_\Free_Counter:Q[2] is Seg7_Dsp:inst|\Free_Counter:Q[2]
--operation mode is arithmetic

B1_\Free_Counter:Q[2]_carry_eqn = B1L4;
B1_\Free_Counter:Q[2]_lut_out = B1_\Free_Counter:Q[2] $ (!B1_\Free_Counter:Q[2]_carry_eqn);
B1_\Free_Counter:Q[2] = DFFEAS(B1_\Free_Counter:Q[2]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L6 is Seg7_Dsp:inst|\Free_Counter:Q[2]~8
--operation mode is arithmetic

B1L6 = CARRY(B1_\Free_Counter:Q[2] & (!B1L4));


--B1_\Free_Counter:Q[0] is Seg7_Dsp:inst|\Free_Counter:Q[0]
--operation mode is arithmetic

B1_\Free_Counter:Q[0]_lut_out = !B1_\Free_Counter:Q[0];
B1_\Free_Counter:Q[0] = DFFEAS(B1_\Free_Counter:Q[0]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L2 is Seg7_Dsp:inst|\Free_Counter:Q[0]~8
--operation mode is arithmetic

B1L2 = CARRY(B1_\Free_Counter:Q[0]);


--B1_\Free_Counter:Q[1] is Seg7_Dsp:inst|\Free_Counter:Q[1]
--operation mode is arithmetic

B1_\Free_Counter:Q[1]_carry_eqn = B1L2;
B1_\Free_Counter:Q[1]_lut_out = B1_\Free_Counter:Q[1] $ (B1_\Free_Counter:Q[1]_carry_eqn);
B1_\Free_Counter:Q[1] = DFFEAS(B1_\Free_Counter:Q[1]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L4 is Seg7_Dsp:inst|\Free_Counter:Q[1]~8
--operation mode is arithmetic

B1L4 = CARRY(!B1L2 # !B1_\Free_Counter:Q[1]);


--D1L1 is b3x8:inst4|YO[0]~117
--operation mode is normal

D1L1 = B1_\Free_Counter:Q[2] & B1_\Free_Counter:Q[0] & B1_\Free_Counter:Q[1];


--D1L2 is b3x8:inst4|YO[0]~118
--operation mode is normal

D1L2 = B1_\Free_Counter:Q[2] & B1_\Free_Counter:Q[1] & (!B1_\Free_Counter:Q[0]);


--D1L3 is b3x8:inst4|YO[0]~119
--operation mode is normal

D1L3 = B1_\Free_Counter:Q[2] & B1_\Free_Counter:Q[0] & (!B1_\Free_Counter:Q[1]);


--D1L4 is b3x8:inst4|YO[0]~120
--operation mode is normal

D1L4 = B1_\Free_Counter:Q[2] & (!B1_\Free_Counter:Q[0] & !B1_\Free_Counter:Q[1]);


--D1L5 is b3x8:inst4|YO[0]~121
--operation mode is normal

D1L5 = B1_\Free_Counter:Q[0] & B1_\Free_Counter:Q[1] & (!B1_\Free_Counter:Q[2]);


--D1L6 is b3x8:inst4|YO[0]~122
--operation mode is normal

D1L6 = B1_\Free_Counter:Q[1] & (!B1_\Free_Counter:Q[2] & !B1_\Free_Counter:Q[0]);


--D1L7 is b3x8:inst4|YO[0]~123
--operation mode is normal

D1L7 = B1_\Free_Counter:Q[0] & (!B1_\Free_Counter:Q[2] & !B1_\Free_Counter:Q[1]);


--D1L8 is b3x8:inst4|YO[0]~124
--operation mode is normal

D1L8 = !B1_\Free_Counter:Q[2] & !B1_\Free_Counter:Q[0] & !B1_\Free_Counter:Q[1];


--B1L92 is Seg7_Dsp:inst|SEGOUT[6]~524
--operation mode is normal

B1L92 = B1_NUMOUT[0] & (B1_NUMOUT[3] # B1_NUMOUT[1] $ B1_NUMOUT[2]) # !B1_NUMOUT[0] & (B1_NUMOUT[1] # B1_NUMOUT[3] $ B1_NUMOUT[2]);


--B1L82 is Seg7_Dsp:inst|SEGOUT[5]~525
--operation mode is normal

B1L82 = B1_NUMOUT[1] & (B1_NUMOUT[3] # B1_NUMOUT[2] & !B1_NUMOUT[0]) # !B1_NUMOUT[1] & (B1_NUMOUT[3] $ B1_NUMOUT[2] # !B1_NUMOUT[0]);


--B1L72 is Seg7_Dsp:inst|SEGOUT[4]~526
--operation mode is normal

B1L72 = B1_NUMOUT[1] & (B1_NUMOUT[3] # !B1_NUMOUT[0]) # !B1_NUMOUT[1] & (B1_NUMOUT[2] & B1_NUMOUT[3] # !B1_NUMOUT[2] & (!B1_NUMOUT[0]));


--B1L62 is Seg7_Dsp:inst|SEGOUT[3]~527
--operation mode is normal

B1L62 = B1_NUMOUT[1] & (B1_NUMOUT[0] & B1_NUMOUT[2] # !B1_NUMOUT[0] & !B1_NUMOUT[2] & B1_NUMOUT[3]) # !B1_NUMOUT[1] & !B1_NUMOUT[3] & (B1_NUMOUT[0] $ B1_NUMOUT[2]);


--B1L52 is Seg7_Dsp:inst|SEGOUT[2]~528
--operation mode is normal

B1L52 = B1_NUMOUT[3] & (B1_NUMOUT[0] & !B1_NUMOUT[1] # !B1_NUMOUT[2]) # !B1_NUMOUT[3] & (B1_NUMOUT[0] # B1_NUMOUT[2] # !B1_NUMOUT[1]);


--B1L42 is Seg7_Dsp:inst|SEGOUT[1]~529
--operation mode is normal

B1L42 = B1_NUMOUT[3] & (B1_NUMOUT[0] & (!B1_NUMOUT[1]) # !B1_NUMOUT[0] & !B1_NUMOUT[2]) # !B1_NUMOUT[3] & (B1_NUMOUT[0] $ !B1_NUMOUT[1] # !B1_NUMOUT[2]);


--B1L32 is Seg7_Dsp:inst|SEGOUT[0]~530
--operation mode is normal

B1L32 = B1_NUMOUT[2] & (B1_NUMOUT[1] # B1_NUMOUT[0] $ B1_NUMOUT[3]) # !B1_NUMOUT[2] & (B1_NUMOUT[1] $ B1_NUMOUT[3] # !B1_NUMOUT[0]);


--C1_QN[14] is fenping:inst1|QN[14]
--operation mode is arithmetic

C1_QN[14]_carry_eqn = C1L92;
C1_QN[14]_lut_out = C1_QN[14] $ (C1_QN[14]_carry_eqn);
C1_QN[14] = DFFEAS(C1_QN[14]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L13 is fenping:inst1|QN[14]~113
--operation mode is arithmetic

C1L13 = CARRY(C1_QN[14] # !C1L92);


--B1_\Free_Counter:Q[6] is Seg7_Dsp:inst|\Free_Counter:Q[6]
--operation mode is arithmetic

B1_\Free_Counter:Q[6]_carry_eqn = B1L21;
B1_\Free_Counter:Q[6]_lut_out = B1_\Free_Counter:Q[6] $ (!B1_\Free_Counter:Q[6]_carry_eqn);
B1_\Free_Counter:Q[6] = DFFEAS(B1_\Free_Counter:Q[6]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L41 is Seg7_Dsp:inst|\Free_Counter:Q[6]~8
--operation mode is arithmetic

B1L41 = CARRY(B1_\Free_Counter:Q[6] & (!B1L21));


--C1_QN[15] is fenping:inst1|QN[15]
--operation mode is normal

C1_QN[15]_carry_eqn = C1L13;
C1_QN[15]_lut_out = C1_QN[15] $ (!C1_QN[15]_carry_eqn);
C1_QN[15] = DFFEAS(C1_QN[15]_lut_out, GCLK3, VCC, , , ~GND, C1_QN[15], , );


--C1_QN[13] is fenping:inst1|QN[13]
--operation mode is arithmetic

C1_QN[13]_carry_eqn = C1L72;
C1_QN[13]_lut_out = C1_QN[13] $ (!C1_QN[13]_carry_eqn);
C1_QN[13] = DFFEAS(C1_QN[13]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L92 is fenping:inst1|QN[13]~121
--operation mode is arithmetic

C1L92 = CARRY(!C1_QN[13] & (!C1L72));


--B1_\Free_Counter:Q[5] is Seg7_Dsp:inst|\Free_Counter:Q[5]
--operation mode is arithmetic

B1_\Free_Counter:Q[5]_carry_eqn = B1L01;
B1_\Free_Counter:Q[5]_lut_out = B1_\Free_Counter:Q[5] $ (B1_\Free_Counter:Q[5]_carry_eqn);
B1_\Free_Counter:Q[5] = DFFEAS(B1_\Free_Counter:Q[5]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L21 is Seg7_Dsp:inst|\Free_Counter:Q[5]~8
--operation mode is arithmetic

B1L21 = CARRY(!B1L01 # !B1_\Free_Counter:Q[5]);


--C1_QN[12] is fenping:inst1|QN[12]
--operation mode is arithmetic

C1_QN[12]_carry_eqn = C1L52;
C1_QN[12]_lut_out = C1_QN[12] $ (C1_QN[12]_carry_eqn);
C1_QN[12] = DFFEAS(C1_QN[12]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L72 is fenping:inst1|QN[12]~125
--operation mode is arithmetic

C1L72 = CARRY(C1_QN[12] # !C1L52);


--B1_\Free_Counter:Q[4] is Seg7_Dsp:inst|\Free_Counter:Q[4]
--operation mode is arithmetic

B1_\Free_Counter:Q[4]_carry_eqn = B1L8;
B1_\Free_Counter:Q[4]_lut_out = B1_\Free_Counter:Q[4] $ (!B1_\Free_Counter:Q[4]_carry_eqn);
B1_\Free_Counter:Q[4] = DFFEAS(B1_\Free_Counter:Q[4]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L01 is Seg7_Dsp:inst|\Free_Counter:Q[4]~8
--operation mode is arithmetic

B1L01 = CARRY(B1_\Free_Counter:Q[4] & (!B1L8));


--C1_QN[11] is fenping:inst1|QN[11]
--operation mode is arithmetic

C1_QN[11]_carry_eqn = C1L32;
C1_QN[11]_lut_out = C1_QN[11] $ (!C1_QN[11]_carry_eqn);
C1_QN[11] = DFFEAS(C1_QN[11]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L52 is fenping:inst1|QN[11]~129
--operation mode is arithmetic

C1L52 = CARRY(!C1_QN[11] & (!C1L32));


--B1_\Free_Counter:Q[3] is Seg7_Dsp:inst|\Free_Counter:Q[3]
--operation mode is arithmetic

B1_\Free_Counter:Q[3]_carry_eqn = B1L6;
B1_\Free_Counter:Q[3]_lut_out = B1_\Free_Counter:Q[3] $ (B1_\Free_Counter:Q[3]_carry_eqn);
B1_\Free_Counter:Q[3] = DFFEAS(B1_\Free_Counter:Q[3]_lut_out, C1_QN[14], VCC, , , , , , );

--B1L8 is Seg7_Dsp:inst|\Free_Counter:Q[3]~8
--operation mode is arithmetic

B1L8 = CARRY(!B1L6 # !B1_\Free_Counter:Q[3]);


--C1_QN[10] is fenping:inst1|QN[10]
--operation mode is arithmetic

C1_QN[10]_carry_eqn = C1L12;
C1_QN[10]_lut_out = C1_QN[10] $ (C1_QN[10]_carry_eqn);
C1_QN[10] = DFFEAS(C1_QN[10]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L32 is fenping:inst1|QN[10]~133
--operation mode is arithmetic

C1L32 = CARRY(C1_QN[10] # !C1L12);


--C1_QN[9] is fenping:inst1|QN[9]
--operation mode is arithmetic

C1_QN[9]_carry_eqn = C1L91;
C1_QN[9]_lut_out = C1_QN[9] $ (!C1_QN[9]_carry_eqn);
C1_QN[9] = DFFEAS(C1_QN[9]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L12 is fenping:inst1|QN[9]~137
--operation mode is arithmetic

C1L12 = CARRY(!C1_QN[9] & (!C1L91));


--C1_QN[8] is fenping:inst1|QN[8]
--operation mode is arithmetic

C1_QN[8]_carry_eqn = C1L71;
C1_QN[8]_lut_out = C1_QN[8] $ (C1_QN[8]_carry_eqn);
C1_QN[8] = DFFEAS(C1_QN[8]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L91 is fenping:inst1|QN[8]~141
--operation mode is arithmetic

C1L91 = CARRY(C1_QN[8] # !C1L71);


--C1_QN[7] is fenping:inst1|QN[7]
--operation mode is arithmetic

C1_QN[7]_carry_eqn = C1L51;
C1_QN[7]_lut_out = C1_QN[7] $ (!C1_QN[7]_carry_eqn);
C1_QN[7] = DFFEAS(C1_QN[7]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L71 is fenping:inst1|QN[7]~145
--operation mode is arithmetic

C1L71 = CARRY(!C1_QN[7] & (!C1L51));


--C1_QN[6] is fenping:inst1|QN[6]
--operation mode is arithmetic

C1_QN[6]_carry_eqn = C1L31;
C1_QN[6]_lut_out = C1_QN[6] $ (C1_QN[6]_carry_eqn);
C1_QN[6] = DFFEAS(C1_QN[6]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L51 is fenping:inst1|QN[6]~149
--operation mode is arithmetic

C1L51 = CARRY(C1_QN[6] # !C1L31);


--C1_QN[5] is fenping:inst1|QN[5]
--operation mode is arithmetic

C1_QN[5]_carry_eqn = C1L11;
C1_QN[5]_lut_out = C1_QN[5] $ (!C1_QN[5]_carry_eqn);
C1_QN[5] = DFFEAS(C1_QN[5]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L31 is fenping:inst1|QN[5]~153
--operation mode is arithmetic

C1L31 = CARRY(!C1_QN[5] & (!C1L11));


--C1_QN[4] is fenping:inst1|QN[4]
--operation mode is arithmetic

C1_QN[4]_carry_eqn = C1L9;
C1_QN[4]_lut_out = C1_QN[4] $ (C1_QN[4]_carry_eqn);
C1_QN[4] = DFFEAS(C1_QN[4]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L11 is fenping:inst1|QN[4]~157
--operation mode is arithmetic

C1L11 = CARRY(C1_QN[4] # !C1L9);


--C1_QN[3] is fenping:inst1|QN[3]
--operation mode is arithmetic

C1_QN[3]_carry_eqn = C1L7;
C1_QN[3]_lut_out = C1_QN[3] $ (!C1_QN[3]_carry_eqn);
C1_QN[3] = DFFEAS(C1_QN[3]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L9 is fenping:inst1|QN[3]~161
--operation mode is arithmetic

C1L9 = CARRY(!C1_QN[3] & (!C1L7));


--C1_QN[2] is fenping:inst1|QN[2]
--operation mode is arithmetic

C1_QN[2]_carry_eqn = C1L5;
C1_QN[2]_lut_out = C1_QN[2] $ (C1_QN[2]_carry_eqn);
C1_QN[2] = DFFEAS(C1_QN[2]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L7 is fenping:inst1|QN[2]~165
--operation mode is arithmetic

C1L7 = CARRY(C1_QN[2] # !C1L5);


--C1_QN[1] is fenping:inst1|QN[1]
--operation mode is arithmetic

C1_QN[1]_carry_eqn = C1L3;
C1_QN[1]_lut_out = C1_QN[1] $ (!C1_QN[1]_carry_eqn);
C1_QN[1] = DFFEAS(C1_QN[1]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L5 is fenping:inst1|QN[1]~169
--operation mode is arithmetic

C1L5 = CARRY(!C1_QN[1] & (!C1L3));


--C1_QN[0] is fenping:inst1|QN[0]
--operation mode is arithmetic

C1_QN[0]_lut_out = !C1_QN[0];
C1_QN[0] = DFFEAS(C1_QN[0]_lut_out, GCLK3, VCC, , , VCC, C1_QN[15], , );

--C1L3 is fenping:inst1|QN[0]~173
--operation mode is arithmetic

C1L3 = CARRY(C1_QN[0]);


--~GND is ~GND
--operation mode is normal

~GND = GND;


--GCLK3 is GCLK3
--operation mode is input

GCLK3 = INPUT();


--LED[3] is LED[3]
--operation mode is output

LED[3] = OUTPUT(B1_NUMOUT[3]);


--LED[2] is LED[2]
--operation mode is output

LED[2] = OUTPUT(B1_NUMOUT[2]);


--LED[1] is LED[1]
--operation mode is output

LED[1] = OUTPUT(B1_NUMOUT[1]);


--LED[0] is LED[0]
--operation mode is output

LED[0] = OUTPUT(B1_NUMOUT[0]);


--SEL[7] is SEL[7]
--operation mode is output

SEL[7] = OUTPUT(D1L1);


--SEL[6] is SEL[6]
--operation mode is output

SEL[6] = OUTPUT(D1L2);


--SEL[5] is SEL[5]
--operation mode is output

SEL[5] = OUTPUT(D1L3);


--SEL[4] is SEL[4]
--operation mode is output

SEL[4] = OUTPUT(D1L4);


--SEL[3] is SEL[3]
--operation mode is output

SEL[3] = OUTPUT(D1L5);


--SEL[2] is SEL[2]
--operation mode is output

SEL[2] = OUTPUT(D1L6);


--SEL[1] is SEL[1]
--operation mode is output

SEL[1] = OUTPUT(D1L7);


--SEL[0] is SEL[0]
--operation mode is output

SEL[0] = OUTPUT(D1L8);


--SG[7] is SG[7]
--operation mode is output

SG[7] = OUTPUT(VCC);


--SG[6] is SG[6]
--operation mode is output

SG[6] = OUTPUT(B1L92);


--SG[5] is SG[5]
--operation mode is output

SG[5] = OUTPUT(B1L82);


--SG[4] is SG[4]
--operation mode is output

SG[4] = OUTPUT(B1L72);


--SG[3] is SG[3]
--operation mode is output

SG[3] = OUTPUT(!B1L62);


--SG[2] is SG[2]
--operation mode is output

SG[2] = OUTPUT(B1L52);


--SG[1] is SG[1]
--operation mode is output

SG[1] = OUTPUT(B1L42);


--SG[0] is SG[0]
--operation mode is output

SG[0] = OUTPUT(B1L32);