#include "copyright_wrs.h"/* includes */#include "vxWorks.h"#include "config.h"#include "sysLib.h"#include "string.h"#include "intLib.h"#include "taskLib.h"#include "vxLib.h"#include "muxLib.h"#include "cacheLib.h"#include "memLib.h"#include "wrSbcArm7.h"#include "arch/arm/mmuArmLib.h"#include "private/vmLibP.h"#include "dllLib.h"/*#include "pciIomapLib.h"*//* imports */#if 0extern void excEnterUndef(void);extern void excEnterSwi(void);extern void excEnterPrefetchAbort(void);extern void excEnterDataAbort(void);extern void intEnt(void);void excIntHandle (void);VOIDFUNCPTR _func_armIrqHandler;	/* IRQ handler */typedef struct {    	UINT32  vector;    	VOIDFUNCPTR  func;} exc_tbl_t; #define SYS_EXC_NUM     5LOCAL exc_tbl_t sysExcTbl[SYS_EXC_NUM] = {    {VEC_BASE_ADDR+0x04,    excEnterUndef},    {VEC_BASE_ADDR+0x08,    excEnterSwi},    {VEC_BASE_ADDR+0x0c,    excEnterPrefetchAbort},    {VEC_BASE_ADDR+0x10,    excEnterDataAbort},    {VEC_BASE_ADDR+0x18,    intEnt}};#endifIMPORT char end;                            /* end of system, created by ld */IMPORT VOIDFUNCPTR _func_armIntStackSplit;  /* ptr to fn to split stack *//* globals */int    sysBus         = BUS;            /* system bus type (VME_BUS, etc) */int    sysCpu         = CPU;            /* system cpu type */char * sysBootLine    = BOOT_LINE_ADRS; /* address of boot line */char * sysExcMsg      = EXC_MSG_ADRS;   /* catastrophic message area */int    sysProcNum;                      /* processor number of this cpu */int    sysFlags;                        /* boot flags */char   sysBootHost [BOOT_FIELD_LEN];    /* name of host from which we booted */char   sysBootFile [BOOT_FIELD_LEN];    /* name of file from which we booted */unsigned char sysAt91cMacAddr[] = ETHERNET_MAC_ADRS;/* locals *//* defines *//* included source files */#ifdef INCLUDE_FLASH#include "flashMem.c"#else /* INCLUDE_FLASH */#include "mem/nullNvRam.c"#endif  /* INCLUDE_FLASH */#include "vme/nullVme.c"#include "sysSerial.c"#include "sngks32cTimer.c"#include "sngks32cIntrCtl.c"#ifdef INCLUDE_NETWORK#ifdef INCLUDE_END#include "sbcCksum.c"#include "sysEnd.c"#endif /* INCLUDE_END */#endif /* INCLUDE_NETWORK */#ifdef INCLUDE_LCD#include "sysLcd.c"#endif /* INCLUDE_LCD */#ifdef INCLUDE_LED#include "sysLed.c"#endif /* INCLUDE_LCD */#ifdef INCLUDE_VWARE_LAUNCH#include "sysVware.c"#endif /* INCLUDE_VWARE_LAUNCH */#ifdef INCLUDE_WINDML#include "ambaKbd.c"#include "ambaMse.c"#include "sysWindML.c"#endif /* INCLUDE_WINDML */#ifdef INCLUDE_USBvoid sysUsbPciInit(void);#endif    /* externals */IMPORT void   sysIntStackSplit (char *, long);#if !defined(INCLUDE_MMU) && \    (defined(INCLUDE_CACHE_SUPPORT) || defined(INCLUDE_MMU_BASIC) || \     defined(INCLUDE_MMU_FULL) || defined(INCLUDE_MMU_MPU))#define INCLUDE_MMU#endif/* globals *//* forward LOCAL functions declarations *//* forward declarations */char *    sysPhysMemTop (void); /* defined(CPU_720T/720T_T/920T/920T_T) */#ifdef INCLUDE_MMU/* * The following structure describes the various different parts of the * memory map to be used only during initialisation by * vm(Base)GlobalMapInit() when INCLUDE_MMU_BASIC/FULL are * defined. * * Clearly, this structure is only needed if the CPU has an MMU! * * The following are not the smallest areas that could be allocated for a * working system. If the amount of memory used by the page tables is * critical, they could be reduced. */PHYS_MEM_DESC sysPhysMemDesc [] =    {    /* adrs and length parameters must be page-aligned (multiples of 0x1000) */	/*AT91RM9200零地址開始前4K字節(jié)用于向量表*/    {    (void *) 0,    (void *) 0,    PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE|VM_STATE_MASK_BUFFERABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE  | VM_STATE_CACHEABLE_NOT|VM_STATE_BUFFERABLE_NOT    },#if 1	/*USB host port*/    {    (void *) 0x300000,	/* virtual address */    (void *) 0x300000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE|VM_STATE_MASK_BUFFERABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT|VM_STATE_BUFFERABLE_NOT    },#endif#if 1/*lcd mem*/    {    (void *) 0x40000000,	/* System controller */    (void *) 0x40000000,    ROUND_UP(0x00400000,PAGE_SIZE),    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE|VM_STATE_MASK_BUFFERABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT|VM_STATE_BUFFERABLE_NOT    },#endif#if 0/*lcd reg*/    {    (void *) 0x40000000,	/* System controller */    (void *) 0x40000000,	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE|VM_STATE_MASK_BUFFERABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT|VM_STATE_BUFFERABLE_NOT    },/*lcd mem*/    {    (void *) 0x40200000,	/* System controller */    (void *) 0x40200000,    ROUND_UP(0x200000, PAGE_SIZE), /*2M*/    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE|VM_STATE_MASK_BUFFERABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT|VM_STATE_BUFFERABLE_NOT    },   #endif	    /*0x20000000地址開始SDRAM */    {    (void *) LOCAL_MEM_LOCAL_ADRS,	/* virtual address */    (void *) LOCAL_MEM_LOCAL_ADRS,	/* physical address */    ROUND_UP(LOCAL_MEM_SIZE, PAGE_SIZE), /* length, then initial state: */    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE|VM_STATE_MASK_BUFFERABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 |/* VM_STATE_CACHEABLE_NOT|VM_STATE_BUFFERABLE_NOT*/VM_STATE_CACHEABLE|VM_STATE_BUFFERABLE   },    /*系統(tǒng)外設(shè) */    {    (void *) 0xfffff000,	/* virtual address */    (void *) 0xfffff000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE|VM_STATE_MASK_BUFFERABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT|VM_STATE_BUFFERABLE_NOT    },    /*用戶外設(shè)	timer 0,1,2*/    {    (void *) 0xfffa0000,	/* virtual address */    (void *) 0xfffa0000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)	timer 3,4,5*/    {    (void *) 0xfffa4000,	/* virtual address */    (void *) 0xfffa4000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*USB device port*/    {    (void *) 0xfffb0000,	/* virtual address */    (void *) 0xfffb0000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*MCI device port*/    {    (void *) 0xfffb4000,	/* virtual address */    (void *) 0xfffb4000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },        /*用戶外設(shè)*/			/*Two wire interface*/    {    (void *) 0xfffb8000,	/* virtual address */    (void *) 0xfffb8000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*EMAC interface*/    {    (void *) 0xfffbc000,	/* virtual address */    (void *) 0xfffbc000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE|VM_STATE_MASK_BUFFERABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT|VM_STATE_BUFFERABLE_NOT    },    /*用戶外設(shè)*/			/*USART0 interface*/    {    (void *) 0xfffc0000,	/* virtual address */    (void *) 0xfffc0000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*USART1 interface*/    {    (void *) 0xfffc4000,	/* virtual address */    (void *) 0xfffc4000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*USART2 interface*/    {    (void *) 0xfffc8000,	/* virtual address */    (void *) 0xfffc8000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*USART3 interface*/    {    (void *) 0xfffcc000,	/* virtual address */    (void *) 0xfffcc000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*SSC0 interface*/    {    (void *) 0xfffd0000,	/* virtual address */    (void *) 0xfffd0000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*SSC1 interface*/    {    (void *) 0xfffd4000,	/* virtual address */    (void *) 0xfffd4000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*SSC2 interface*/    {    (void *) 0xfffd8000,	/* virtual address */    (void *) 0xfffd8000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*用戶外設(shè)*/			/*SPI interface*/    {    (void *) 0xfffe0000,	/* virtual address */    (void *) 0xfffe0000,	/* physical address */	PAGE_SIZE,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },    /*     * ROM is normally marked as uncacheable by VxWorks. We leave it like that     * for the time being, even though this has a severe impact on execution     * speed from ROM.     */#ifdef USE_BOOT_FLASH         {    (void *)0x10000000,    (void *)0x10000000,    ROUND_UP (ROM_SIZE_TOTAL, PAGE_SIZE),    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,#ifdef INCLUDE_FLASH    /* needs to be writable */    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT#else    VM_STATE_VALID	| VM_STATE_WRITABLE  | VM_STATE_CACHEABLE#endif    },#endif     #ifdef INCLUDE_TFFS#ifndef TFFS_FLASH_TYPE#error Must define flash type!#endif     /*     * I/O space:     * Do not map in all I/O space, only that which has something there.     * Otherwise we will use all of RAM allocating page tables!     */    {    (void *) FLASH_BASE_ADRS,	/* Core Module Header regs */    (void *) FLASH_BASE_ADRS,#if (TFFS_FLASH_TYPE==NAND_FLASH)	PAGE_SIZE,#else	        ROUND_UP(FLASH_SIZE,PAGE_SIZE),#endif        VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },#ifdef INCLUDE_SERIAL    {    (void *) 0xfffa0000,	/* System controller */    (void *) 0xfffa0000,    ROUND_UP(0x00060000,PAGE_SIZE),    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID	| VM_STATE_WRITABLE	 | VM_STATE_CACHEABLE_NOT    },#endif #endif#if 0    /*     * The following entry is for the "real" address of the Core Module     * SDRAM (as opposed to the alias in low memory). The size of the area     * mapped here is for the amount that has been "occluded" by the Core     * Module SSRAM from zero upwards.     */    {    (void *) INTEGRATOR_HDR0_SDRAM_BASE,    (void *) INTEGRATOR_HDR0_SDRAM_BASE,    ROUND_UP (INTEGRATOR_HDR_SSRAM_SIZE, PAGE_SIZE),    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT    }#endif   };int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);#endif/******************************************************************************** sysModel - return the model name of the CPU board** This routine returns the model name of the CPU board.* * RETURNS: A pointer to a string identifying the board and CPU.*/char *sysModel (void)    {#if (_BYTE_ORDER == _LITTLE_ENDIAN)#if   (CPU == ARMARCH4)    return    "AT91Arm9 - ARM920T (ARM)";#elif (CPU == ARMARCH4_T)    return    "AT91Arm9 - ARM920T (Thumb)";#else