?? uart00.c
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/* * linux/drivers/char/serial_uart00.c * * Driver for UART00 serial ports * * Based on drivers/char/serial_amba.c, by ARM Limited & * Deep Blue Solutions Ltd. * Copyright 2001 Altera Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * * $Id: uart00.c,v 1.3.2.5 2002/10/24 09:53:26 rmk Exp $ * */#include <linux/config.h>#include <linux/module.h>#include <linux/errno.h>#include <linux/signal.h>#include <linux/sched.h>#include <linux/interrupt.h>#include <linux/tty.h>#include <linux/tty_flip.h>#include <linux/major.h>#include <linux/string.h>#include <linux/fcntl.h>#include <linux/ptrace.h>#include <linux/ioport.h>#include <linux/mm.h>#include <linux/slab.h>#include <linux/init.h>#include <linux/circ_buf.h>#include <linux/serial.h>#include <linux/console.h>#include <linux/sysrq.h>#include <asm/system.h>#include <asm/io.h>#include <asm/irq.h>#include <asm/uaccess.h>#include <asm/bitops.h>#include <asm/sizes.h>#if defined(CONFIG_SERIAL_UART00_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)#define SUPPORT_SYSRQ#endif#include <linux/serial_core.h>#include <asm/arch/excalibur.h>#define UART00_TYPE (volatile unsigned int*)#include <asm/arch/uart00.h>#include <asm/arch/int_ctrl00.h>#undef DEBUG#define UART_NR 2#define SERIAL_UART00_NAME "ttyUA"#define SERIAL_UART00_MAJOR 204#define SERIAL_UART00_MINOR 16 /* Temporary - will change in future */#define SERIAL_UART00_NR UART_NR#define UART_PORT_SIZE 0x50#define CALLOUT_UART00_NAME "cuaua"#define CALLOUT_UART00_MAJOR 205#define CALLOUT_UART00_MINOR 16 /* Temporary - will change in future */#define CALLOUT_UART00_NR UART_NRstatic struct tty_driver normal, callout;static struct tty_struct *uart00_table[UART_NR];static struct termios *uart00_termios[UART_NR], *uart00_termios_locked[UART_NR];//static struct uart_state uart00_state[UART_NR];static struct console uart00_console;#define UART00_ISR_PASS_LIMIT 256/* * Access macros for the UART00 UARTs */#define UART_GET_INT_STATUS(p) inl(UART_ISR((p)->membase))#define UART_PUT_IES(p, c) outl(c,UART_IES((p)->membase))#define UART_GET_IES(p) inl(UART_IES((p)->membase))#define UART_PUT_IEC(p, c) outl(c,UART_IEC((p)->membase))#define UART_GET_IEC(p) inl(UART_IEC((p)->membase))#define UART_PUT_CHAR(p, c) outl(c,UART_TD((p)->membase))#define UART_GET_CHAR(p) inl(UART_RD((p)->membase))#define UART_GET_RSR(p) inl(UART_RSR((p)->membase))#define UART_GET_RDS(p) inl(UART_RDS((p)->membase))#define UART_GET_MSR(p) inl(UART_MSR((p)->membase))#define UART_GET_MCR(p) inl(UART_MCR((p)->membase))#define UART_PUT_MCR(p, c) outl(c,UART_MCR((p)->membase))#define UART_GET_MC(p) inl(UART_MC((p)->membase))#define UART_PUT_MC(p, c) outl(c,UART_MC((p)->membase))#define UART_GET_TSR(p) inl(UART_TSR((p)->membase))#define UART_GET_DIV_HI(p) inl(UART_DIV_HI((p)->membase))#define UART_PUT_DIV_HI(p,c) outl(c,UART_DIV_HI((p)->membase))#define UART_GET_DIV_LO(p) inl(UART_DIV_LO((p)->membase))#define UART_PUT_DIV_LO(p,c) outl(c,UART_DIV_LO((p)->membase))#define UART_RX_DATA(s) ((s) & UART_RSR_RX_LEVEL_MSK)#define UART_TX_READY(s) (((s) & UART_TSR_TX_LEVEL_MSK) < 15)//#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART00_UARTFR_TMSK) == 0)static void uart00_stop_tx(struct uart_port *port, u_int from_tty){ UART_PUT_IEC(port, UART_IEC_TIE_MSK);}static void uart00_stop_rx(struct uart_port *port){ UART_PUT_IEC(port, UART_IEC_RE_MSK);}static void uart00_enable_ms(struct uart_port *port){ UART_PUT_IES(port, UART_IES_ME_MSK);}static voiduart00_rx_chars(struct uart_info *info, struct pt_regs *regs){ struct tty_struct *tty = info->tty; unsigned int status, ch, rds, flg, ignored = 0; struct uart_port *port = info->port; status = UART_GET_RSR(port); while (UART_RX_DATA(status)) { /* * We need to read rds before reading the * character from the fifo */ rds = UART_GET_RDS(port); ch = UART_GET_CHAR(port); port->icount.rx++; if (tty->flip.count >= TTY_FLIPBUF_SIZE) goto ignore_char; flg = TTY_NORMAL; /* * Note that the error handling code is * out of the main execution path */ if (rds & (UART_RDS_BI_MSK |UART_RDS_FE_MSK| UART_RDS_PE_MSK |UART_RDS_PE_MSK)) goto handle_error; if (uart_handle_sysrq_char(info, ch, regs)) goto ignore_char; error_return: *tty->flip.flag_buf_ptr++ = flg; *tty->flip.char_buf_ptr++ = ch; tty->flip.count++; ignore_char: status = UART_GET_RSR(port); }out: tty_flip_buffer_push(tty); return;handle_error: if (rds & UART_RDS_BI_MSK) { status &= ~(UART_RDS_FE_MSK | UART_RDS_PE_MSK); port->icount.brk++;#ifdef SUPPORT_SYSRQ if (uart_handle_break(info, &uart00_console)) goto ignore_char;#endif } else if (rds & UART_RDS_PE_MSK) port->icount.parity++; else if (rds & UART_RDS_PE_MSK) port->icount.frame++; if (rds & UART_RDS_OE_MSK) port->icount.overrun++; if (rds & port->ignore_status_mask) { if (++ignored > 100) goto out; goto ignore_char; } rds &= port->read_status_mask; if (rds & UART_RDS_BI_MSK) flg = TTY_BREAK; else if (rds & UART_RDS_PE_MSK) flg = TTY_PARITY; else if (rds & UART_RDS_FE_MSK) flg = TTY_FRAME; if (status & UART_RDS_OE_MSK) { /* * CHECK: does overrun affect the current character? * ASSUMPTION: it does not. */ *tty->flip.flag_buf_ptr++ = flg; *tty->flip.char_buf_ptr++ = ch; tty->flip.count++; if (tty->flip.count >= TTY_FLIPBUF_SIZE) goto ignore_char; ch = 0; flg = TTY_OVERRUN; }#ifdef SUPPORT_SYSRQ info->sysrq = 0;#endif goto error_return;}static void uart00_tx_chars(struct uart_info *info){ int count; struct uart_port *port=info->port; if (port->x_char) { while((UART_GET_TSR(port)& UART_TSR_TX_LEVEL_MSK)==15); UART_PUT_CHAR(port, port->x_char); port->icount.tx++; port->x_char = 0; return; } if (info->xmit.head == info->xmit.tail || info->tty->stopped || info->tty->hw_stopped) { uart00_stop_tx(info->port, 0); return; } count = port->fifosize >> 1; do { while((UART_GET_TSR(port)& UART_TSR_TX_LEVEL_MSK)==15); UART_PUT_CHAR(port, info->xmit.buf[info->xmit.tail]); info->xmit.tail = (info->xmit.tail + 1) & (UART_XMIT_SIZE - 1); port->icount.tx++; if (info->xmit.head == info->xmit.tail) break; } while (--count > 0); if (CIRC_CNT(info->xmit.head, info->xmit.tail, UART_XMIT_SIZE) < WAKEUP_CHARS) uart_event(info, EVT_WRITE_WAKEUP); if (info->xmit.head == info->xmit.tail) uart00_stop_tx(info->port, 0);}static void uart00_start_tx(struct uart_port *port, u_int nonempty, u_int from_tty){ struct uart_info *info=(struct uart_info*)(port->iobase); UART_PUT_IES(port,UART_IES_TIE_MSK ); uart00_tx_chars(info);}static void uart00_modem_status(struct uart_info *info){ unsigned int status; struct uart_icount *icount = &info->port->icount; status = UART_GET_MSR(info->port); if (!status & (UART_MSR_DCTS_MSK | UART_MSR_DDSR_MSK | UART_MSR_TERI_MSK | UART_MSR_DDCD_MSK)) return; if (status & UART_MSR_DDCD_MSK) { icount->dcd++;#ifdef CONFIG_HARD_PPS if ((info->flags & ASYNC_HARDPPS_CD) && (status & UART_MSR_DCD_MSK)) hardpps();#endif if (info->flags & ASYNC_CHECK_CD) { if (status & UART_MSR_DCD_MSK) wake_up_interruptible(&info->open_wait); else if (!((info->flags & ASYNC_CALLOUT_ACTIVE) && (info->flags & ASYNC_CALLOUT_NOHUP))) { if (info->tty) tty_hangup(info->tty); } } } if (status & UART_MSR_DDSR_MSK) icount->dsr++; if (status & UART_MSR_DCTS_MSK) { icount->cts++; if (info->flags & ASYNC_CTS_FLOW) { status &= UART_MSR_CTS_MSK; if (info->tty->hw_stopped) { if (status) { info->tty->hw_stopped = 0; info->ops->start_tx(info->port, 1, 0); uart_event(info, EVT_WRITE_WAKEUP); } } else { if (!status) { info->tty->hw_stopped = 1; info->ops->stop_tx(info->port, 0); } } } } wake_up_interruptible(&info->delta_msr_wait);}static void uart00_int(int irq, void *dev_id, struct pt_regs *regs){ struct uart_info *info = dev_id; unsigned int status, pass_counter = 0; status = UART_GET_INT_STATUS(info->port); do { if (status & UART_ISR_RI_MSK) uart00_rx_chars(info, regs); if (status & (UART_ISR_TI_MSK | UART_ISR_TII_MSK)) uart00_tx_chars(info); if (status & UART_ISR_MI_MSK) uart00_modem_status(info); if (pass_counter++ > UART00_ISR_PASS_LIMIT) break; status = UART_GET_INT_STATUS(info->port); } while (status);}static u_int uart00_tx_empty(struct uart_port *port){ return UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK? 0 : TIOCSER_TEMT;}static u_int uart00_get_mctrl(struct uart_port *port){ unsigned int result = 0; unsigned int status; status = UART_GET_MSR(port); if (status & UART_MSR_DCD_MSK) result |= TIOCM_CAR; if (status & UART_MSR_DSR_MSK) result |= TIOCM_DSR; if (status & UART_MSR_CTS_MSK) result |= TIOCM_CTS; if (status & UART_MSR_RI_MSK) result |= TIOCM_RI; return result;}static void uart00_set_mctrl_null(struct uart_port *port, u_int mctrl){}static void uart00_break_ctl(struct uart_port *port, int break_state){ unsigned int mcr; mcr = UART_GET_MCR(port);
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