#ifndef _SERIAL_H
#define _SERIAL_H

#include "typedef.h"
#include "ascii.h"


/********************************/
/*         寄存器地址表         */
/********************************/

#define Offset_Divisor_Low		( 0x00 )
#define Offset_FIFO_Rev			( 0x00 )
#define Offset_FIFO_Tran			( 0x00 )
#define Offset_Divisor_High		( 0x04 )
#define Offset_IntEnable			( 0x04 )
#define Offset_IntStauts			( 0x08 )
#define Offset_FifoControl			( 0x08 )
#define Offset_LineControl		( 0x0c )
#define Offset_ModemControl		( 0x10 )
#define Offset_LineStauts			( 0x14 )
#define Offset_ModemStauts		( 0x18 )


/******************************/
/*           控制位           */
/******************************/

//傳輸控制寄存器(LCR) 
#define msk_DataBit_5			0x00
#define msk_DataBit_6			0x01
#define msk_DateBit_7			0x02
#define msk_DateBit_8			0x03
#define msk_DataBit_ZI		0xfc

#define msk_StopBit			0x04
#define msk_ParityEnable		0x08
#define msk_EvenParity		0x10
#define msk_StickParity		0x20
#define msk_Break			0x40
#define msk_DivisorSel		0x80


//中斷使能寄存器(IER) 
#define msk_INT_EN_RevData		0x01
#define msk_INT_EN_TranData		0x02
#define msk_INT_EN_RevStatus	0x04
#define msk_INT_EN_ModemStaus	0x08


//中斷識別寄存器(IIR) 
#define msk_INT_STAUTS_Primary		0x01
#define msk_INT_STAUTS_RevStatus	0x06
#define msk_INT_STAUTS_RevData		0x04
#define msk_INT_STAUTS_RevTimeout	0x0c
#define msk_INT_STAUTS_TranData	0x08
#define msk_INT_STAUTS_Modem		0x00


//FIFO 控制寄存器(FCR) 
#define msk_Clear_FIFO_R		        0x02
#define msk_Clear_FIFO_T		        0x04

#define msk_TrigerLever_Tra_0	0x00
#define msk_TrigerLever_Tra_2	0x10
#define msk_TrigerLever_Tra_4	0x20
#define msk_TrigerLever_Tra_8	0x30
#define msk_TrigerLever_Tra_ZI	0xcf

#define msk_TrigerLever_Rev_1	0x00
#define msk_TrigerLever_Rev_4	0x40
#define msk_TrigerLever_Rev_8	0x80
#define msk_TrigerLever_Rev_14	0xc0
#define msk_TrigerLever_Rev_ZI	0x3f

//傳輸狀態寄存器(LSR) 
#define msk_DataReady		0x01
#define msk_OverrunErr		0x02
#define msk_ParityErr			0x04
#define msk_FrameErr			0x08
#define msk_BreakInt			0x10
#define msk_T_FIFO_Empty	0x20
#define msk_TranEmpty		0x40
#define msk_RevErr			0x80

//Modem 控制寄存器(MCR) 

//Modem 狀態寄存器(MSR)


/***********************************/
/*             宏定義              */
/***********************************/

#define UART0_ID        0
#define UART1_ID        1

#define StopBit_0         FALSE
#define StopBittt_1       TRUE

#define Parity_Enable    TRUE
#define Parity_Diskable  FALSE


#define Parity_Even      TRUE
#define Parity_Odd       FALSE

#define StickPartiy_Disabke     FALSE
#define StickParity_Enable      TRUE

#define OutBreak_Disable    FALSE
#define OutBreak_Enable     TRUE


#define TrigLev_Rev_1      1
#define TrigLev_Rev_4      4
#define TrigLev_Rev_8      8
#define TrigLev_Rev_14    14

#define TrigLev_Tran_0      0
#define TrigLev_Tran_2      2
#define TrigLev_Tran_4      4
#define TrigLev_Tran_8      8

#define DataBit_5       5
#define DataBit_6       6
#define DataBit_7       7
#define DataBit_8       8



/***********************************/
/*          常量及宏定義           */
/***********************************/

#define TranTrigerEnable(Channel) \
    (REG8(GetBaseAddr(Channel) +Offset_IntEnable) |= msk_INT_EN_TranData)
#define RevTrigerEnable(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_IntEnable) |= msk_INT_EN_RevData)
#define setStopBit(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) |= msk_StopBit)
#define clearStopBit(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) &= ~msk_StopBit)
#define setParityBit(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) |= msk_ParityEnable)
#define clearParityBit(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) &= ~msk_ParityEnable)
#define setEvenParity(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) |= msk_EvenParity)
#define setOddParity(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) &= ~msk_EvenParity)
#define setStickParity(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) |= msk_StickParity)
#define clearStickParity(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) &= ~msk_StickParity)
#define setBreakBit(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) |= msk_Break)
#define clearBreakBit(Channel) \
    (REG8(GetBaseAddr(Channel) + Offset_LineControl) &= ~msk_Break)


/***********************************/
/*             函數聲明            */
/***********************************/
void serial_init ( U32 /*Channel*/,
                   U32 /*BaudRate*/, U32 /*DataBit*/, 
                   U32 /*TrigerLever_Rev*/, U32 /*TrigerLever_Tra*/, 
                   BOOL /*StopBit*/, 
                   BOOL /*ParityEnable*/, 
                   BOOL /*EvenParity*/, 
                   BOOL /*StickParity*/, 
                   BOOL /*Break*/);

void serial_putc (U32 /*Channel*/, const U8 /*Char*/);
U8  serial_tstc (U32 /*Channel*/);
void serial_puts (U32 /*Channel*/, const U8 * /* point of Char */);
U8 serial_getc (U32 /*Channel*/);


#endif