#ifndef __MEMDEFS_H__
#define __MEMDEFS_H__


#define MEM_BASE_PHYSICAL			0xA3CB8000
//#define MEM_BASE_PHYSICAL			0xA1CB8000
#define DISPLAY_DMA_OFFSET			(0x48000)

//
// DMA Descriptor offset
//
#define DMA_DESC_SIZE				(0x20)

//
// LCD DMA Definitions
//
// Must be aligned on 128-bit boundary. (Bits 0-3 must be 0)
// Allocate a minimum of 0x14 bytes each.
//
#define DMA_CHANNEL_0_FRAME_DESCRIPTOR_BASE_PHYSICAL		(MEM_BASE_PHYSICAL+DISPLAY_DMA_OFFSET)	// 00-1F																													

#define DMA_CHANNEL_1_FRAME_DESCRIPTOR_BASE_PHYSICAL		(DMA_CHANNEL_0_FRAME_DESCRIPTOR_BASE_PHYSICAL+DMA_DESC_SIZE)	// 20-3F

#define DMA_CHANNEL_0_ALT_FRAME_DESCRIPTOR_BASE_PHYSICAL	(DMA_CHANNEL_1_FRAME_DESCRIPTOR_BASE_PHYSICAL+DMA_DESC_SIZE)	// 40-5F

#define PALETTE_FRAME_DESCRIPTOR_BASE_PHYSICAL				(DMA_CHANNEL_0_ALT_FRAME_DESCRIPTOR_BASE_PHYSICAL+DMA_DESC_SIZE)	// 60-7F


//
// Must be aligned on 64-bit boundary. (Bits 0-2 must be 0)
// Allocate 0x200 bytes. (256 x 2 bytes/pixel)
//
#define DMA_PALETTE_SIZE			(0x200)
#define PALETTE_BUFFER_BASE_PHYSICAL						(PALETTE_FRAME_DESCRIPTOR_BASE_PHYSICAL+DMA_DESC_SIZE)	// 80-27F


// Must be aligned on 64-bit boundary. (Bits 0-2 must be 0)
// Allocate 0x96000 bytes. (640 x 480 x (2 bytes/pixel))
#define DMA_FRAME_SIZE			(0x96000) //		(0xBB8000) 
#define FRAME_BUFFER_0_BASE_PHYSICAL						(PALETTE_BUFFER_BASE_PHYSICAL+DMA_PALETTE_SIZE)		// 280-9627F

// Must be aligned on 64-bit boundary. (Bits 0-2 must be 0)
// Allocate 0x96000 bytes. (640 x 480 x (2 bytes/pixel))
#define FRAME_BUFFER_1_BASE_PHYSICAL						(FRAME_BUFFER_0_BASE_PHYSICAL+DMA_FRAME_SIZE)		// 96280-12C27F




#endif