?? start_v2.lst
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A166 MACRO ASSEMBLER START_V2 08/08/2006 15:48:01 PAGE 1
MACRO ASSEMBLER A166 V5.20
OBJECT MODULE PLACED IN Start_V2.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C166\BIN\A166.EXE Start_V2.A66 MODV2 SEGMENTED MODV2 SET(SMALL) DEBUG EP
LOC OBJ LINE SOURCE
1 $MODV2 ; Define C166v2 core mode
2 ;
3 ;------------------------------------------------------------------------------
4 ; This file is part of the C166 Compiler package
5 ; Copyright KEIL ELEKTRONIK GmbH 1993 - 2005
6 ; Version 5.06
7 ; Note: PHAx default set to 0 as bypass for TwinCAN device problem.
8 ; *** <<< Use Configuration Wizard in Context Menu >>> ***
9 ;
10 ;------------------------------------------------------------------------------
11 ; START_V2.A66: This code is executed after processor reset and provides the
12 ; startup sequence for the C166v2/Super10 architecture CPU's.
13 ; (i.e. XC161, XC164, XC167, ect.)
14 ;
15 ; You may add this file to a uVision2 project - in this case it will be
16 ; automatically assembled and linked.
17 ;
18 ; For manual translation of this file use A166 with the following invocation:
19 ;
20 ; A166 START_V2.A66 SET (model)
21 ;
22 ; model determines the memory model and can be one of the following:
23 ; TINY, SMALL, COMPACT, HCOMPACT, MEDIUM, LARGE, HLARGE, XLARGE
24 ;
25 ; Example: A166 START_V2.A66 SET (SMALL)
26 ;
27 ; For manual linkage of the modified START_V2.OBJ file to your application
28 ; use the following L166 invocation:
29 ;
30 ; L166 your object file list, START_V2.OBJ controls
31 ;
32 ;------------------------------------------------------------------------------
33 ; Setup model-dependend Assembler controls
34 $CASE
35 $IF NOT TINY
36 $SEGMENTED
37 $ENDIF
38 ; Settings for ADDRSEL calculation (do not change!)
0400 39 KB EQU 0x400 ; define KB constant for CS _SIZE calculation
00100000 40 MB EQU 0x400*KB ; define MB as 1024KB
41 ;------------------------------------------------------------------------------
42 ;
43 ; <h>Definitions for System and User Stack
44 ; ========================================
45 ;
46 ; <o>STKSZ: Maximum System Stack Size selection <0x0-0x1000:0x2>
47 ; <i> Defines the system stack space that is used by CALL/RET and PUSH/POP
48 ; <i> instructions. The system stack space must be adjusted according the actual
49 ; <i> requirements of the application.
0200 50 SSTSZ EQU 0x200
51 ; <o> USTSZ: User Stack Size Definition <0x0-0x4000:0x2>
52 ; <i> Defines the user stack space available for automatics. This stack space is
53 ; <i> accessed by R0. The user stack space must be adjusted according the actual
54 ; <i> requirements of the application.
0200 55 USTSZ EQU 0x200 ; set User Stack Size to 200H Bytes.
56 ;
57 ; <o> UST1SZ: User Stack Size for local register bank 1 <0x0-0x4000:0x2>
58 ; <i> Defines the user stack space available for the interrupt functions that are
A166 MACRO ASSEMBLER START_V2 08/08/2006 15:48:01 PAGE 2
59 ; <i> assigned to the local register bank 1. Since the compiler cannot copy the R0
60 ; <i> value to local register banks, the user stack must be assign separately.
61 ; <i> If you have no interrupt functions assigned to local register bank 1, you may
62 ; <i> set UST1SZ to 0.
0020 63 UST1SZ EQU 0x20 ; set User Stack Size to 20H Bytes.
64 ;
65 ; <o> UST2SZ: User Stack Size for local register bank 2 <0x0-0x4000:0x2>
66 ; <i> Defines the user stack space available for the interrupt functions that are
67 ; <i> assigned to the local register bank 1. Since the compiler cannot copy the R0
68 ; <i> value to local register banks, the user stack must be assign separately.
69 ; If you have no interrupt functions assigned to local register bank 2, you may
70 ; set UST2SZ to 0.
0020 71 UST2SZ EQU 0x20 ; set User Stack Size to 20H Bytes.
72 ;
73 ; </h>
74 ; <h>Definitions for Startup Code
75 ; ===============================
76 ;
77 ; <q> CLR_MEMORY: Enable/Disable Memory Zero Initialization of RAM area
78 ; --- <i> Set CLR_MEMORY = 0 to disable memory zero initilization
79 $SET (CLR_MEMORY = 1)
80 ;
81 ; <q> INIT_VARS: Enable/Disable Variable Initialization
82 ; --- <i> Set INIT_VARS = 0 to disable variable initilization
83 $SET (INIT_VARS = 1)
84 ;
85 ; <q> DPPUSE: Allow re-assign of DPP registers
86 ; --- <i> Set DPPUSE = 0 to reduce the code size of the startup code, if you
87 ; <i> are not using the L166 DPPUSE directive.
88 $SET (DPPUSE = 1)
89 ;
90 ; <q> DPP3USE: Use DPP3 register during variable initilization
91 ; --- <i> Set DPP3USE = 0 to disable the usage of DPP3 during initilization of
92 ; <i> variables. This option might be required if you write
93 ; <i> program parts that are reloaded during application
94 ; <i> execution and increase code size of the startup code.
95 $SET (DPP3USE = 1)
96 ;
97 ;</h>
98 ; <h> CPU Configuration
99 ; =====================
100 ;
101 ; <h> Definitions for CPU Configuration Register CPUCON1
102 ; ======================================================
103 ;
104 ; <q> ZCJ: Enable Zero Cycle Jump Function (CPUCON1.0):
0001 105 _ZCJ EQU 1 ; 0 = Disable Zero Cycle Jump Function /Dave/
106 ; 1 = Enable Zero Cycle Jump Function
107 ;
108 ; <q> BP: Enable Branch Prediction Unit (CPUCON1.1):
0001 109 _BP EQU 1 ; 0 = Disable Branch Prediction Unit /Dave/
110 ; 1 = Enable Branch Prediction Unit
111 ;
112 ; <q> INTSCXT: Enable Interruptability of Switch Context Instruction (CPUCON1.2):
0001 113 _INTSCXT EQU 1 ; 0 = Disable Interruption of SCXT instruction /Dave/
114 ; 1 = Enable Interruption of SCXT instruction
115 ;
116 ; SGTDIS: Disable Segmentation Control (CPUCON1.3):
$IF TINY
_SGTDIS EQU 0 ; disable segmented mode for TINY model /Dave/
119 $ELSE
0000 120 _SGTDIS EQU 0 ; enable segmented mode (Reset Value)
121 $ENDIF
122 ;
123 ; <o> WDTCTL: Watchdog Timer Control (CPUCON1.4):
124 ; <0=> DISWDT executable until end of EINIT <1=> DISWDT/ENWDT always executable
A166 MACRO ASSEMBLER START_V2 08/08/2006 15:48:01 PAGE 3
0000 125 _WDTCTL EQU 0 ; 0 = DISWDT executable until end of EINIT /Dave/
126 ; 1 = DISWDT/ENWDT always executable
127 ;
128 ; <o> VECSC: Vector Table Scaling Factor (CPUCON1.5 .. CPUCON1.6)
129 ; <0=> 2 words <1=> 4 words <2=> 8 words <3=> 16 words
0000 130 _VECSC EQU 0 ; 0 = Space between two vectors is 2 words /Dave/
131 ; 1 = Space between two vectors is 4 words
132 ; 2 = Space between two vectors is 8 words
133 ; 3 = Space between two vectors is 16 words
134 ;
135 ; </h>
136 ; <e> Definitions for CPU Configuration Register CPUCON2
137 ; ======================================================
138 ;
139 ; INIT_CPUCON2: Init CPUCON2 register
140 ; --- <i>Set INIT_CPUCON2 to initilize the CPUCON2 register
141 $SET (INIT_CPUCON2 = 0) ; default: do not initilize CPUCON2
142 ;
143 ; <q> SL: Enable Short Loop Mode (CPUCON2.0)
0001 144 _SL EQU 1 ; 0 = Short Loop mode disabled /Dave/
145 ; 1 = Short Loop mode enabled
146 ;
147 ; <q> DIAD: Disable Atomic Injection Deny (CPUCON2.1)
0001 148 _DIAD EQU 1 ; 0 = Injection-requests are denied during Atomic
149 ; 1 = Injection-requests are not denied during Atomic
150 ;
151 ; <q> RETST: Enable Return Stack (CPUCON2.3)
0001 152 _RETST EQU 1 ; 0 = Return Stack disabled /Dave/
153 ; 1 = Return Stack enabled
154 ;
155 ; <q> OVRUN: Allow Pipeline Bubble Overrun (CPUCON2.4)
0001 156 _OVRUN EQU 1 ; 0 = Overrun of Pipeline Bubbles not allowed /Dave/
157 ; 1 = Overrun of Pipeline Bubbles allowed
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