?? bulid_option_8367.c
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/** ###################################################################
** Filename : Bulid_option_8367.C
** Project : Bulid_option_8367
** Processor : 56F8367
** Version : Driver 01.12
** Compiler : Metrowerks DSP C Compiler
** Date/Time : 8/31/2007, 10:09 AM
** Abstract :
** Main module.
** Here is to be placed user's code.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2006
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Bulid_option_8367 */
//The example is developed under CW8.0 and 56F8367EVM
//The code demo how to define an array rather than data pointer and allocated
//the array to a specific address which is configured in CPU bean. user use /CS2 to access
//the space
//Result: connect CS2 (pin7 of J6 in 56F8367EVM) to oscilloscope, user can see /CS2 toggle
//in main.c
//user should write the code:
/***********************************************************/
//#pragma define_section mysection ".mysection.data" RW
/* 2. Specify the data to be put into the section. */
//#pragma section mysection begin
//unsigned int array[0x200];
//#pragma section mysection end
//in link command file,define
// .xData1 (RW) : ORIGIN = 0x00010000, LENGTH = 0x00080000
//the above line is generated automatically
// .ApplDat:
// {
// * (.mysection.data)
// }> .xData1
/****************************************************************/
//user should configure CS2 module and External memory module in "CPU
//properties" in CPU bean
//secondly, user should configure the "build option" in CPU bean
/* Including used modules for compiling procedure */
#include "Cpu.h"
/* Include shared modules, which are used for whole project */
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#define GPIO_D_BASE 0x00F320
#define GPIO_D_PER1 0x00F323
#define EMI_BASE 0x00F020
#define CSBAR2 EMI_BASE+2
#define CSOR2 EMI_BASE+0xA
#define CST2 EMI_BASE+0x12
#define BCR EMI_BASE+0x18
#define SIM_BASE 0x00F350
#define SIM_GPS1 SIM_BASE+0xB
#define SIM_PCE1 SIM_BASE+0xC
#pragma define_section mysection ".mysection.data" RW
/* 2. Specify the data to be put into the section. */
#pragma section mysection begin
unsigned int array[0x200];
#pragma section mysection end
void configure_EMI(void);
void main(void)
{
unsigned int i,temp;
/* Write your local variable definition here */
/*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/
PE_low_level_init();
#if 0
configure_EMI();
#endif
/*** End of Processor Expert internal initialization. ***/
// asm(bfclr #$0010,x:SIM_GPS1); //configure the GPIO_D0 as /CS2
/* Write your code here */
while(1)
{
for(i=0;i<0x200;i++)
{
array[i]=i;
temp=array[i];
asm(nop); //set break here
}
asm(nop);
}
}
void configure_EMI(void)
{
asm(bfset #$0001,X:GPIO_D_PER1); //GPIO_D1 is configured as peripheral
// *((unsigned int*)(GPIO_D_PER))= 0x0002;
asm(bfclr #$0010,x:SIM_GPS1); //configure the GPIO_D1 as /CS3
asm(bfset #$8000,x:SIM_PCE1); //enable EMI
/* CSBAR1: ADR23=0,ADR22=0,ADR21=0,ADR20=1,ADR19=0,ADR18=0,ADR17=0,ADR16=0,ADR15=0,ADR14=0,ADR13=0,ADR12=0,BLKSZ3=0,BLKSZ2=0,BLKSZ1=0,BLKSZ0=0 */
asm(move.w #$0107,x:CSBAR2); //$K words RAM access /* Chip select 1 base address register */
/* CSOR1: RWS=8,BYTE_EN=3,R_W=3,PS_DS=1,WWS=5 */
asm(move.w #$47A5,x:CSOR2); /* Chip select 1 option register */
/* CSTC_1: */
asm(bfset #$8000,x:BCR);
asm(move.w #$FF03,x:CST2); // using default value
return;
}
/* END Bulid_option_8367 */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 2.98.02 [03.79]
** for the Freescale 56800 series of microcontrollers.
**
** ###################################################################
*/
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