/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Vectors.C
**     Project   : Bulid_option_8367
**     Processor : 56F8367
**     Version   : Bean 01.031, Driver 01.32, CPU db: 2.87.053
**     Compiler  : Metrowerks DSP C Compiler
**     Date/Time : 8/31/2007, 10:09 AM
**     Abstract  :
**
**     Settings  :
**
**
**     (c) Copyright UNIS, spol. s r.o. 1997-2006
**     UNIS, spol. s r.o.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : info@processorexpert.com
** ###################################################################*/

#include "Cpu.h"

/*lint -save -e40 -e718 -e746 -e745 -e939 -e937 -e957 -e505 -e522 -e533 Disable MISRA rule (20,75,71,53,83) checking. */

extern void _EntryPoint(void);         /* Startup routine */

#pragma define_section interrupt_vectorsboot "interrupt_vectorsboot.text"  RX
#pragma section interrupt_vectorsboot begin
static asm void _vectboot(void) {
  JMP  _EntryPoint                     /* Reset vector (Used) */
  JMP  _EntryPoint                     /* COP reset vector (Used) */
}
#pragma section interrupt_vectorsboot end

#pragma define_section interrupt_vectors "interrupt_vectors.text"  RX
#pragma section interrupt_vectors begin
static asm void _vect(void) {
  JMP  _EntryPoint                     /* Interrupt no. 0 (Used)   - ivINT_Reset */
  JMP  _EntryPoint                     /* Interrupt no. 1 (Used)   - ivINT_COPReset  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 2 (Unused) - ivINT_Illegal_Instruction  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 3 (Unused) - ivINT_SW3  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 4 (Unused) - ivINT_HWStackOverflow  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 5 (Unused) - ivINT_MisalignedLongWordAccess  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 6 (Unused) - ivINT_OnCE_StepCounter  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 7 (Unused) - ivINT_OnCE_BU0  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 8 (Unused) - ivReserved0  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 9 (Unused) - ivINT_OnCE_TraceBuffer  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 10 (Unused) - ivINT_OnCE_TxREmpty  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 11 (Unused) - ivINT_OnCE_RxRFull  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 12 (Unused) - ivReserved1  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 13 (Unused) - ivReserved2  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 14 (Unused) - ivINT_SW2  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 15 (Unused) - ivINT_SW1  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 16 (Unused) - ivINT_SW0  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 17 (Unused) - ivINT_IRQA  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 18 (Unused) - ivINT_IRQB  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 19 (Unused) - ivReserved3  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 20 (Unused) - ivINT_LVI  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 21 (Unused) - ivINT_PLL  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 22 (Unused) - ivINT_HFM_ERR  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 23 (Unused) - ivINT_HFM_CC  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 24 (Unused) - ivINT_HFM_CBE  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 25 (Unused) - ivReserved4  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 26 (Unused) - ivINT_FlexCAN_BusOff  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 27 (Unused) - ivINT_FlexCAN_Error  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 28 (Unused) - ivINT_FlexCAN_WakeUp  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 29 (Unused) - ivINT_FlexCAN_MB  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 30 (Unused) - ivINT_GPIO_F  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 31 (Unused) - ivINT_GPIO_E  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 32 (Unused) - ivINT_GPIO_D  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 33 (Unused) - ivINT_GPIO_C  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 34 (Unused) - ivINT_GPIO_B  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 35 (Unused) - ivINT_GPIO_A  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 36 (Unused) - ivReserved5  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 37 (Unused) - ivReserved6  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 38 (Unused) - ivINT_SPI1_RxFull  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 39 (Unused) - ivINT_SPI1_TxEmpty  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 40 (Unused) - ivINT_SPI0_RxFull  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 41 (Unused) - ivINT_SPI0_TxEmpty  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 42 (Unused) - ivINT_SCI1_TxEmpty  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 43 (Unused) - ivINT_SCI1_TxIdle  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 44 (Unused) - ivReserved7  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 45 (Unused) - ivINT_SCI1_RxError  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 46 (Unused) - ivINT_SCI1_RxFull  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 47 (Unused) - ivINT_DEC1_Home_Watchdog  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 48 (Unused) - ivINT_DEC1_Index  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 49 (Unused) - ivINT_DEC0_Home_Watchdog  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 50 (Unused) - ivINT_DEC0_Index  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 51 (Unused) - ivReserved8  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 52 (Unused) - ivINT_TMRD0  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 53 (Unused) - ivINT_TMRD1  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 54 (Unused) - ivINT_TMRD2  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 55 (Unused) - ivINT_TMRD3  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 56 (Unused) - ivINT_TMRC0  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 57 (Unused) - ivINT_TMRC1  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 58 (Unused) - ivINT_TMRC2  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 59 (Unused) - ivINT_TMRC3  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 60 (Unused) - ivINT_TMRB0  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 61 (Unused) - ivINT_TMRB1  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 62 (Unused) - ivINT_TMRB2  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 63 (Unused) - ivINT_TMRB3  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 64 (Unused) - ivINT_TMRA0  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 65 (Unused) - ivINT_TMRA1  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 66 (Unused) - ivINT_TMRA2  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 67 (Unused) - ivINT_TMRA3  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 68 (Unused) - ivINT_SCI0_TxEmpty  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 69 (Unused) - ivINT_SCI0_TxIdle  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 70 (Unused) - ivReserved9  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 71 (Unused) - ivINT_SCI0_RxError  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 72 (Unused) - ivINT_SCI0_RxFull  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 73 (Unused) - ivINT_ADCB_Complete  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 74 (Unused) - ivINT_ADCA_Complete  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 75 (Unused) - ivINT_ADCB_ZC_LE  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 76 (Unused) - ivINT_ADCA_ZC_LE  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 77 (Unused) - ivINT_PWMB_Reload  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 78 (Unused) - ivINT_PWMA_Reload  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 79 (Unused) - ivINT_PWMB_Fault  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 80 (Unused) - ivINT_PWMA_Fault  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 81 (Unused) - ivINT_LP  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 82 (Unused) - ivINT_FlexCAN2_BusOff  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 83 (Unused) - ivINT_FlexCAN2_Error  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 84 (Unused) - ivINT_FlexCAN2_WakeUp  */
  JSR  Cpu_Interrupt                   /* Interrupt no. 85 (Unused) - ivINT_FlexCAN2_MB  */
}
#pragma section interrupt_vectors end

/*lint -restore */
/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 2.98.02 [03.79]
**     for the Freescale 56800 series of microcontrollers.
**
** ###################################################################
*/