?? osd_configure.h
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//The old files is "System.h"
//---------------------------------------------------------------------------
// Terawins Inc. Company Confidential Strictly Private
//
// $Archive: System.h $
// $Revision: 1.0 $
// $Author: JoannW $
// $Date: 2002/06/18 $
//
// --------------------------------------------------------------------------
// >>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
// --------------------------------------------------------------------------
// Copyright 2002(c) Terawins Inc.
// This is an unpublished work.
// --------------------------------------------------------------------------
#if !defined(__OSD_CONFIG_H__)
#define __OSD_CONFIG_H__
//sds
//***************************************************************
//Test
//***************************************************************
//#define DISPLAY_FUNC
#define AUTO_DETECT
//#define FIX_OUTPUT_TIMING //for fixed (fine tune) output timing and scaling
#define T100
//#define TV
#ifdef TV
// #define PAL
#define NTSC
#define PAL_I 0x0e
#define PAL_DK 0x0f
#endif
//#define T515
#define NTSC_SIGNAL 0
#define PAL_SIGNAL 4
#define SECAM_SIGNAL 2
#define ZOOM_TIMING
/////////////////PANEL config
#ifdef T100
//#define LOAD_TIME
#define NEW_BOARD
#define AU_7 //2004-11-11
//#define PANASONIC_7 //2004-11-11
//#define PVI_7
//#define LG_7 //2004-11-11
//#define AT_56
//#define PVI_9
//#define TOSHIBA_7
//#define AU_35
//#define PVI_10
#ifdef AT_56
#define Panel_ID 0x05
#define AT_VGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x7D
#define GATE_PREDRIVE 0x03
#endif
#ifdef AU_7
#define Panel_ID 0x01
#define KVGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x75//7d
#define GATE_PREDRIVE 0x03
#endif
#ifdef PANASONIC_7
#define Panel_ID 0x02
#define KVGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x7F
#define OUT_PIN_CONF 0xE4
#define GATE_PREDRIVE 0x05
#endif
#ifdef PVI_7
#define Panel_ID 0x03
#define KVGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x7F
#define OUT_PIN_CONF 0xE4
#define GATE_PREDRIVE 0x03
#endif
#ifdef PVI_9
#define Panel_ID 0x06
#define PVI_9_VGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x75
#define OUT_PIN_CONF 0xb8
#define GATE_PREDRIVE 0x03
#endif
#ifdef LG_7
#define Panel_ID 0x04
#define KVGA
#define TCON
#define TIME_PROTOCOL 0x37
#define OUT_PIN_CONF 0xEC
#define GATE_PREDRIVE 0x03
#endif
#ifdef TOSHIBA_7
#define Panel_ID 0x08
#define KVGA
#define TCON
#define TIME_PROTOCOL 0x7f
#define OUT_PIN_CONF 0xE4
#define GATE_PREDRIVE 0x03
#endif
#ifdef PVI_10
#define Panel_ID 0x01
#define P_VGA
#define TCON
#define TIME_PROTOCOL 0x21
#define OUT_PIN_CONF 0xc4
#define GATE_PREDRIVE 0x03
#endif
#else
//#define AU_7D
#define INCH10_2
//#define INCH_17
//#define AU_12
//#define TOSHIBA_12
//#define HANSTAR_9
//#define SHARP_8
//#define HITACH_7
//#define TOSHIBA_7_7
#ifdef HANSTAR_9
#define Panel_ID 0x06
#define WVGA
#define TCON
#define ROTATE
#endif
#ifdef AU_7D
#define WVGA
#define TCON
#define ROTATE
#endif
#ifdef INCH10_2
#define Panel_ID 0x01
#define WVGA
#define TCON
#define ROTATE
#endif
#ifdef TOSHIBA_12
#define Panel_ID 0x05
#define WXGA1
#endif
#ifdef AU_12
#define Panel_ID 0x02
#define WXGA
#endif
#ifdef INCH_17
#define Panel_ID 0x03
#define WXGA
#endif
#ifdef SHARP_8
#define Panel_ID 0x07
#define VGA
#define ROTATE
#endif
#ifdef HITACH_7
#define Panel_ID 0x08
#define WVGA
#endif
#ifdef TOSHIBA_7_7
#define Panel_ID 0x09
#define T_VGA
#endif
#endif
/////////////////////////////////
//#define component
//***************************************************************
//Test
//***************************************************************
#define DELAY_LINES 4
//***************************************************************
//Source
//***************************************************************
#ifdef NEW_BOARD
typedef enum{
#ifdef TV
isrcTV=0x01,
isrcCVIDEO2,
#else
isrcCVIDEO1=0x01,
// isrcCVIDEO2,
#endif
// isrcCVIDEO3,
isrcSVIDEO,
// isrcSVIDE1,
#ifdef component
isrcCOMPONENT,
#endif
#ifdef T515
isrc_T515_CVIDEO1,
isrc_T515_CVIDEO2,
isrc_T515_SVIDEO,
#endif
isrc_end
}VIDEOINPUT;
#else
typedef enum{
#ifdef TV
isrcTV=0x01,
isrcCVIDEO2,
#else
isrcCVIDEO1=0x01,
isrcCVIDEO2,
#endif
isrcCVIDEO3,
isrcCVIDEO4,
isrcSVIDEO,
#ifdef component
isrcCOMPONENT,
#endif
#ifdef T515
isrc_T515_CVIDEO1,
isrc_T515_CVIDEO2,
isrc_T515_SVIDEO,
#endif
isrc_end
}VIDEOINPUT;
#endif
//***************************************************************
//define Port
//***************************************************************
/*sbit BKLIGHT_EN = P0^7;
sbit AUDIO_MUTE = P1^3;
sbit CHIP_RESET = P2^2;
sbit VIDEO_RESET = P1^5;
sbit LED_GREEN = P2^6;
sbit LED_RED = P2^7;
sbit LEFT_RIGHT = P0^5;
sbit UP_DOWN = P0^6;*/
/************************************
System
************************************/
#define TIMER0
#define INTERRUPT1
#define TIMER1
#define XCLK 27000000
#ifdef KVGA
#define DFDIV_40 21//27 //40MHz 0xC8
#define DIDIV 2//3 //0xC9
#define DODIV 3//3 //0xCA
#endif
#ifdef VGA
#define DFDIV_40 28//27 //40MHz 0xC8
#define DIDIV 2//3 //0xC9
#define DODIV 2//3 //0xCA
#endif
#ifdef P_VGA
#define DFDIV_40 28 //27 //40MHz 0xC8
#define DIDIV 2//3 //0xC9
#define DODIV 2//3 //0xCA
#endif
#ifdef T_VGA
#define DFDIV_40 28 //31//27 //40MHz 0xC8
#define DIDIV 3 //0xC9
#define DODIV 3 //0xCA
#endif
#ifdef PVI_9_VGA
#define DFDIV_40 28 //40MHz
#define DIDIV 2 //0xC9
#define DODIV 3 //0xCA
#endif
#ifdef WVGA
#ifdef HITACH_7
#define DFDIV_40 32 //40MHz
#define DIDIV 2 //0xC9
#define DODIV 2 //0xCA
#else
#define DFDIV_40 43 //40MHz
#define DIDIV 2 //0xC9
#define DODIV 2 //0xCA
#endif
#endif
#ifdef WXGA
#ifdef AU_12
#define DFDIV_40 42 //40MHz
#else
#define DFDIV_40 46 //40MHz
#endif
#define DIDIV 2 //0xC9
#define DODIV 1 //0xCA
#endif
#ifdef WXGA1
#define DFDIV_40 42 //40MHz
#define DIDIV 2 //0xC9
#define DODIV 1 //0xCA
#endif
#ifdef AT_VGA
#define DFDIV_40 0x1c//27 //40MHz 0xC8
#define DIDIV 2//3 //0xC9
#define DODIV 3//3 //0xCA
#endif
#define DRDIV (1<<(DODIV+1))
#define DNDIV_40 ((float)(DFDIV_40+2)/(DIDIV+2)/DRDIV)
#define BACKLIGHT
#define POWER_ON_SEQUENCE
#define NVRAM
/************************************
Display
************************************/
//#define TCON
//#define ROTATE
//#define RSDS
//#define AUDIO_AVAILABLE
//#define INTERLACED
//#define TMDS
#ifdef AUDIO_AVAILABLE
#define VPWME 0x10
#define PVOL_BGHS_SEL 0x04
#else
#define VPWME 0x00
#define PVOL_BGHS_SEL 0x00
#endif
#ifdef TMDS
#define TMDS_LOW 39000000
#define TMDS_HIGH 80000000
#endif
//#define TCONPOWER 1 //this if for chip bug May.08
#ifdef TCON
#define TCONPOWER 1
#define TCON_GO_SYNC 1
#else
#define TCONPOWER 0
#define TCON_GO_SYNC 0
#endif
#define DIGITAL_BRIGHT
#define DIGITAL_CONTRAST
#define GAMMA_EN
#ifdef GAMMA_EN
// #define GAMMAR_ONLY
// #define GAMMAG_ONLY
// #define GAMMAB_ONLY
#define GAMMARGB_TOGETHER
#endif
#define FAILSAFE_EN
#ifdef FAILSAFE_EN
#define VSYNC_MAX 85
#endif
//#define INTERLACED
/************************************
Input Source
************************************/
#define VIDEO_AVAILABLE 1
#define TV_AVAILABLE 1
/************************************
Software Config
************************************/
#define FAILSAFE_ADJ_EN
#define FAILSAFE_ADJ_POS 0x01
#define FAILSAFE_ADJ_FREQ 0x02
#define FAILSAFE_ADJ_PHASE 0x04
#define SUBSAMPLE_ADJ_EN
#define SUBSAMPLE_ADJ_POS 0x01
#define SUBSAMPLE_ADJ_FREQ 0x02
#define SUBSAMPLE_ADJ_PHASE 0x04
#define DUBLESAMPLE_ADJ_EN
#define DUBLESAMPLE_ADJ_POS 0x01
#define DUBLESAMPLE_ADJ_FREQ 0x02
#define DUBLESAMPLE_ADJ_PHASE 0x04
//#define DOSMODE_ADJ_EN
#define DOSMODE_ADJ_POS 0x01
#define DOSMODE_ADJ_FREQ 0x02
#define DOSMODE_ADJ_PHASE 0x04
#define GM_RGB_ALL_SAME
#define ADJ_DIGITAL 1
#define ADJ_ADC 0
//Ruby add 2005-06-07
typedef enum{
ScaleFULL = 0x00,
Scale4_3 ,
#ifdef ZOOM_TIMING
ZOOM_1,
ZOOM_2,
ZOOM_3,
ZOOM_4,
ZOOM_5,
#endif
/*#ifdef T515
Scale1_1 ,
#endif */
ScaleEnd ,
Scale16_9
}Scale_Type;
#if 0
#define H_Size 640 //0xdc 0xdd //0xb4 0xb5 //0xdc 0xdd
#define V_Size 482 //0xde 0xdf //0xb6 0xb7 //0xde 0xdf
#define V_Size43 360
#define H_Size43 480//382//0x0138 312
#endif
#ifdef P_VGA
#define H_Size 640 //0xdc 0xdd //0xb4 0xb5 //0xdc 0xdd
#define V_Size 468 //0xde 0xdf //0xb6 0xb7 //0xde 0xdf
#define H_Size43 640//382//0x0138 312
#endif
#ifdef PVI_9_VGA
#define H_Size 640//0x0280
#define V_Size 220//0x00dc
#define H_Size43 430
#endif
#ifdef AT_VGA
#define H_Size 640 //0xdc 0xdd //0xb4 0xb5 //0xdc 0xdd
#define V_Size 234 //0xde 0xdf //0xb6 0xb7 //0xde 0xdf
#define H_Size43 430//382//0x0138 312
#endif
#ifdef KVGA
#define H_Size 480 //0xdc 0xdd //0xb4 0xb5 //0xdc 0xdd
#define V_Size 234 //0xde 0xdf //0xb6 0xb7 //0xde 0xdf
#define H_Size43 360
#endif
#ifdef WVGA
#define H_Size 800
#define V_Size 480
#define H_Size43 702
#endif
#ifdef WXGA
#define H_Size 0x0500 //0xdc 0xdd //0xb4 0xb5 //0xdc 0xdd
#ifdef AU_12
#define V_Size 0x0320 //0xde 0xdf //0xb6 0xb7 //0xde 0xdf
#else
#define V_Size 0x02ff //0xde 0xdf //0xb6 0xb7 //0xde 0xdf
#endif
#define H_Size43 0x0500
#endif
#ifdef WXGA1
#define H_Size 1024
#define V_Size 768 //0xde 0xdf //0xb6 0xb7 //0xde 0xdf
#define H_Size43 800
#endif
#ifdef T_VGA
#define H_Size 400 //0xdc 0xdd //0xb4 0xb5 //0xdc 0xdd
#define V_Size 234 //0xde 0xdf //0xb6 0xb7 //0xde 0xdf
#define H_Size43 340
#endif
/*************************************************************
Function:The panel.h files define
*************************************************************/
typedef enum{
isrcTV =0x01,
isrcCVIDEO2,
isrcCVIDEO3,
isrcCVIDEO4,
// isrcSVIDEO,
isrc_T515_CVIDEO1,
isrc_T515_CVIDEO2,
isrc_T515_SVIDEO,
// isrc_end,
isrcCOMPONENT
}VIDEOINPUT;
#endif // __SYSTEM_H__
#define TV
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