?? dsparm6202b-327.drc
字號:
Protel Design System Design Rule Check
PCB File : Documents\DSPARM6202B-327.PCB
Date : 27-Feb-2004
Time : 11:03:36
Processing Rule : Pads and Vias to follow the Drill pairs settings
Rule Violations :0
Processing Rule : Testpoint Style (Under Component=Yes) (On the board )
Rule Violations :0
Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board )
Rule Violations :0
Processing Rule : Broken-Net Constraint ( (On the board ) )
Rule Violations :0
Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board )
Rule Violations :0
Processing Rule : Broken-Net Constraint ( (On the board ) )
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=5mil) (On the board ),(On the board )
Rule Violations :0
Processing Rule : Width Constraint (Min=10mil) (Max=120mil) (Prefered=10mil) (Disabled)(On the board )
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=6mil) (Disabled)(On the board ),(On the board )
Rule Violations :0
Processing Rule : Width Constraint (Min=6mil) (Max=120mil) (Prefered=6mil) (On the board )
Rule Violations :0
Processing Rule : Width Constraint (Min=8mil) (Max=120mil) (Prefered=8mil) (Disabled)(On the board )
Rule Violations :0
Violations Detected : 0
Time Elapsed : 00:00:04
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