/************************************************ 
  NAME    : LCDLIB.H
  DESC    :
  Revision History
  2007.9.29      孫俊軍
 ************************************************/

#ifndef __LCDLIB_H__
#define __LCDLIB_H__

#define MVAL		(13)
#define MVAL_USED 	(0)
#define M5D(n) ((n) & 0x1fffff)	// To get lower 21bits

//***********************************************************
//TFT LCD Panel(320*240)

#define MODE_TFT_8BIT_320240 	 (0x4102)

//***********************************************************

//*************************************************************************
//TFT 320240
#define LCD_XSIZE_TFT_320240 	(320)	
#define LCD_YSIZE_TFT_320240 	(240)
//**************************************************************************

//************************************************************************
//TFT 320240
#define SCR_XSIZE_TFT_320240 	(LCD_XSIZE_TFT_320240*2)
#define SCR_YSIZE_TFT_320240 	(LCD_YSIZE_TFT_320240*2)
//******************************************************************************

//**********************************************************************
//TFT320240
#define HOZVAL_TFT_320240	(LCD_XSIZE_TFT_320240-1)
#define LINEVAL_TFT_320240	(LCD_YSIZE_TFT_320240-1)
//*************************************************************************

//*******************************************************************
//Timing parameter for TD036THEA1(統(tǒng)寶) 
#define VBPD_320240		((2-1)&0xff)
#define VFPD_320240		((3-1)&0xff)
#define VSPW_320240		((2-1) &0x3f)
#define HBPD_320240		((7-1)&0x7f)
#define HFPD_320240		((3-1)&0xff)
#define HSPW_320240		((4-1)&0xff)
//*************************************************************

#define CLKVAL_STN_MONO		(20) 	
    // 64hz @50Mhz,WLH=16hclk,WDLY=16hclk,LINEBLANK=1*8hclk,VD=4 
#define CLKVAL_STN_GRAY		(10) 	
    // 120hz @50Mhz,WLH=16hclk,WDLY=16hclk,LINEBLANK=13*8hclk,VD=4 
#define CLKVAL_CSTN		(6) 	
    // 130hz @50Mhz,WLH=16hclk,WDLY=16hclk,LINEBLANK=16*8hclk,VD=8  
//*************************************************************
#define CLKVAL_TFT_320240	(4) 	
    // 60hz @50Mhz
    //VSYNC,HSYNC should be inverted
    //HBPD=6VCLK,HFPD=2VCLK,HSPW=3VCLK
    //VBPD=1HSYNC,VFPD=2HSYNC,VSPW=1HSYNC   
//**************************************************************     

#define CLKVAL_TFT_800600 	(0)
    //85hz @90Mhz
    //71hz @76Mhz
    //VSYNC,HSYNC should be inverted
    //HBPD=29VCLK,HFPD=29VCLK,HSPW=11VCLK
    //VBPD=1HSYNC,VFPD=2HSYNC,VSPW=0HSYNC
#define LCDFRAMEBUFFER 0x33800000 //_NONCACHE_STARTADDRESS 
    // 1. The LCD frame buffer should be write-through or non-cachable.
    // 2. The total frame memory should be inside 4MB.
    // 3. To meet above 2 conditions, the frame buffer should be 
    // inside the following regions.
    // 0x31000000~0x313ffffff,
    // 0x31400000~0x317ffffff,
    // 0x31800000~0x31bffffff,
    //        .....    
    // 0x33800000~0x33bffffff                


//Mono

//**************************************************************
//TFT 320240
extern U32 (*frameBuffer8BitTft320240)[SCR_XSIZE_TFT_320240/4];
extern U32 (*frameBuffer16BitTft320240)[SCR_XSIZE_TFT_320240/2];
//******************************************************************

void Lcd_Init320240(void);
void MoveViewPort(int);
void Lcd_CstnOnOff(int onoff);
void Lcd_EnvidOnOff(int onoff);
void Lcd_PowerEnable(int invpwren,int pwren);
void Lcd_MoveViewPort(int vx,int vy,int type);
void Lcd_Lpc3600Enable(void);


#endif /*__LCDLIB_H__*/