?? mga_vid.c
字號:
b = mga_grkey.ckey.blue >> 3; break; case BPP_24: case BPP_32_DIR: case BPP_32_PAL: r = mga_grkey.ckey.red; g = mga_grkey.ckey.green; b = mga_grkey.ckey.blue; break; } // Disable color keying on alpha channel writeb(PALWTADD, XCOLMSK); writeb(X_DATAREG, 0x00); writeb(PALWTADD, X_COLKEY); writeb(X_DATAREG, 0x00); // Set up color key registers writeb(PALWTADD, XCOLKEY0RED); writeb(X_DATAREG, r); writeb(PALWTADD, XCOLKEY0GREEN); writeb(X_DATAREG, g); writeb(PALWTADD, XCOLKEY0BLUE); writeb(X_DATAREG, b); // Set up color key mask registers writeb(PALWTADD, XCOLMSK0RED); writeb(X_DATAREG, 0xff); writeb(PALWTADD, XCOLMSK0GREEN); writeb(X_DATAREG, 0xff); writeb(PALWTADD, XCOLMSK0BLUE); writeb(X_DATAREG, 0xff); } } // Backend Scaler writel(BESCTL, regs.besctl); if (is_g400) writel(BESLUMACTL, regs.beslumactl); writel(BESPITCH, regs.bespitch); writel(BESA1ORG, regs.besa1org); writel(BESA1CORG, regs.besa1corg); writel(BESA2ORG, regs.besa2org); writel(BESA2CORG, regs.besa2corg); writel(BESB1ORG, regs.besb1org); writel(BESB1CORG, regs.besb1corg); writel(BESB2ORG, regs.besb2org); writel(BESB2CORG, regs.besb2corg); if(is_g400) { writel(BESA1C3ORG, regs.besa1c3org); writel(BESA2C3ORG, regs.besa2c3org); writel(BESB1C3ORG, regs.besb1c3org); writel(BESB2C3ORG, regs.besb2c3org); } writel(BESHCOORD, regs.beshcoord); writel(BESHISCAL, regs.beshiscal); writel(BESHSRCST, regs.beshsrcst); writel(BESHSRCEND, regs.beshsrcend); writel(BESHSRCLST, regs.beshsrclst); writel(BESVCOORD, regs.besvcoord); writel(BESVISCAL, regs.besviscal); writel(BESV1SRCLST, regs.besv1srclst); writel(BESV1WGHT, regs.besv1wght); writel(BESV2SRCLST, regs.besv2srclst); writel(BESV2WGHT, regs.besv2wght); //update the registers somewhere between 1 and 2 frames from now. writel(BESGLOBCTL, regs.besglobctl + ((readl(VCOUNT)+2)<<16)); if (mga_verbose > 1) { printf("[mga] wrote BES registers\n"); printf("[mga] BESCTL = 0x%08x\n", readl(BESCTL)); printf("[mga] BESGLOBCTL = 0x%08x\n", readl(BESGLOBCTL)); printf("[mga] BESSTATUS= 0x%08x\n", readl(BESSTATUS)); }#ifdef CRTC2 if (cregs_save.c2ctl == 0) { int i; cregs_save.c2ctl = readl(C2CTL); cregs_save.c2datactl = readl(C2DATACTL); cregs_save.c2misc = readl(C2MISC); for (i = 0; i <= 8; i++) { writeb(CRTCEXTX, i); printf("CRTCEXT%d %x\n", i, readb(CRTCEXTD)); } printf("c2ctl:0x%08x c2datactl:0x%08x\n", cregs_save.c2ctl, cregs_save.c2datactl); printf("c2misc:0x%08x\n", readl(C2MISC)); printf("c2ctl:0x%08x c2datactl:0x%08x\n", cregs.c2ctl, cregs.c2datactl); } if (restore) { writel(C2CTL, cregs_save.c2ctl); writel(C2DATACTL, cregs_save.c2datactl); writel(C2MISC, cregs_save.c2misc); return; } // disable c2en CRTC2 acording to specs writel(C2CTL, cregs.c2ctl & 0xfffffffe); //writel(C2DATACTL, ((readl(C2DATACTL) & ~0x000000ff) + (cregs.c2datactl & 0x000000ff))); writeb(PALWTADD, XMISCCTRL); { int a = readb(X_DATAREG); printf("XXXXX 0x%x\n", a); }// writeb(X_DATAREG, (readb(X_DATAREG) & ~(0x06 | 0xe0)) | (0x02 | 0xA0)); // MAFC - mfcsel & vdoutsel writeb(X_DATAREG, (readb(X_DATAREG) & ~(0x06 | 0xe0)) | (0x02 | 0xC0)); // MAFC - mfcsel & vdoutsel // writeb(XMISCCTRL, (readb(XMISCCTRL) & 0x19) | 0x92); // writeb(XMISCCTRL, (readb(XMISCCTRL) & ~0xe9) + 0xa2); writel(C2DATACTL, cregs.c2datactl); writel(C2HPARAM, cregs.c2hparam); writel(C2HSYNC, cregs.c2hsync); writel(C2VPARAM, cregs.c2vparam); writel(C2VSYNC, cregs.c2vsync); writel(C2MISC, cregs.c2misc); if (mga_verbose > 1) printf("[mga] c2offset = %d\n", cregs.c2offset); writel(C2OFFSET, cregs.c2offset); writel(C2STARTADD0, cregs.c2startadd0); // writel(C2STARTADD1, cregs.c2startadd1);// writel(C2PL2STARTADD0, cregs.c2pl2startadd0); // writel(C2PL2STARTADD1, cregs.c2pl2startadd1);// writel(C2PL3STARTADD0, cregs.c2pl3startadd0); // writel(C2PL3STARTADD1, cregs.c2pl3startadd1);// writel(C2SPICSTARTADD0, cregs.c2spicstartadd0); //xx writel(C2SPICSTARTADD1, cregs.c2spicstartadd1); writel(C2SUBPICLUT, cregs.c2subpiclut); writel(C2PRELOAD, cregs.c2preload); // finaly enable everything writel(C2CTL, cregs.c2ctl); // printf("c2ctl:0x%08x c2datactl:0x%08x\n",readl(C2CTL), readl(C2DATACTL)); // printf("c2misc:0x%08x\n", readl(C2MISC));#endif}#ifdef MGA_ALLOW_IRQstatic void enable_irq(){ long int cc; cc = readl(IEN); // printf("*** !!! IRQREG = %d\n", (int)(cc&0xff)); writeb(CRTCX, 0x11); writeb(CRTCD, 0x20); /* clear 0, enable off */ writeb(CRTCD, 0x00); /* enable on */ writeb(CRTCD, 0x10); /* clear = 1 */ writel(BESGLOBCTL, regs.besglobctl); return;}static void disable_irq(){ writeb(CRTCX, 0x11); writeb(CRTCD, 0x20); /* clear 0, enable off */ return;}void mga_handle_irq(int irq, void *dev_id/*, struct pt_regs *pregs*/) { // static int frame=0; // static int counter=0; long int cc; // if ( ! mga_enabled_flag ) return; // printf("vcount = %d\n",readl(VCOUNT)); //printf("mga_interrupt #%d\n", irq); if ( irq != -1 ) { cc = readl(STATUS); if ( ! (cc & 0x10) ) return; /* vsyncpen */ // debug_irqcnt++; } // if ( debug_irqignore ) { // debug_irqignore = 0; /* if ( mga_conf_deinterlace ) { if ( mga_first_field ) { // printf("mga_interrupt first field\n"); if ( syncfb_interrupt() ) mga_first_field = 0; } else { // printf("mga_interrupt second field\n"); mga_select_buffer( mga_current_field | 2 ); mga_first_field = 1; } } else { syncfb_interrupt(); } */ // frame=(frame+1)&1; regs.besctl = (regs.besctl & ~0x07000000) + (mga_next_frame << 25); writel(BESCTL, regs.besctl);#ifdef CRTC2 crtc2_frame_sel(mga_next_frame);#endif#if 0 ++counter; if(!(counter&63)){ printf("mga irq counter = %d\n",counter); }#endif // } else { // debug_irqignore = 1; // } if ( irq != -1 ) { writeb(CRTCX, 0x11); writeb(CRTCD, 0); writeb(CRTCD, 0x10); } //writel(BESGLOBCTL, regs.besglobctl);}#endif /* MGA_ALLOW_IRQ */int VIDIX_NAME(vixConfigPlayback)(vidix_playback_t *config){ unsigned int i; int x, y, sw, sh, dw, dh; int besleft, bestop, ifactor, ofsleft, ofstop, baseadrofs, weight, weights;#ifdef CRTC2#define right_margin 0#define left_margin 18#define hsync_len 46#define lower_margin 10#define vsync_len 4#define upper_margin 39 unsigned int hdispend = (config->src.w + 31) & ~31; unsigned int hsyncstart = hdispend + (right_margin & ~7); unsigned int hsyncend = hsyncstart + (hsync_len & ~7); unsigned int htotal = hsyncend + (left_margin & ~7); unsigned int vdispend = config->src.h; unsigned int vsyncstart = vdispend + lower_margin; unsigned int vsyncend = vsyncstart + vsync_len; unsigned int vtotal = vsyncend + upper_margin;#endif if ((config->num_frames < 1) || (config->num_frames > MGA_DEFAULT_FRAMES)) { printf("[mga] illegal num_frames: %d, setting to %d\n", config->num_frames, MGA_DEFAULT_FRAMES); config->num_frames = MGA_DEFAULT_FRAMES; } for(;config->num_frames>0;config->num_frames--) { /*FIXME: this driver can use more frames but we need to apply some tricks to avoid RGB-memory hits*/ mga_src_base = ((mga_ram_size/2)*0x100000-config->num_frames*config->frame_size); mga_src_base &= (~0xFFFF); /* 64k boundary */ if(mga_src_base>=0) break; } if (mga_verbose > 1) printf("[mga] YUV buffer base: 0x%x\n", mga_src_base); config->dga_addr = mga_mem_base + mga_src_base; x = config->dest.x; y = config->dest.y; sw = config->src.w; sh = config->src.h; dw = config->dest.w; dh = config->dest.h; config->dest.pitch.y=32; config->dest.pitch.u=config->dest.pitch.v=16; if (mga_verbose) printf("[mga] Setting up a %dx%d-%dx%d video window (src %dx%d) format %X\n", dw, dh, x, y, sw, sh, config->fourcc); if ((sw < 4) || (sh < 4) || (dw < 4) || (dh < 4)) { printf("[mga] Invalid src/dest dimensions\n"); return(EINVAL); } //FIXME check that window is valid and inside desktop // printf("[mga] vcount = %d\n", readl(VCOUNT)); sw += sw & 1; switch(config->fourcc) { case IMGFMT_I420: case IMGFMT_IYUV: case IMGFMT_YV12: sh+=sh&1; config->frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2; break; case IMGFMT_YUY2: case IMGFMT_UYVY: config->frame_size = ((sw + 31) & ~31) * sh * 2; break; default: printf("[mga] Unsupported pixel format: %x\n", config->fourcc); return(ENOTSUP); } config->offsets[0] = 0; // config->offsets[1] = config->frame_size; // config->offsets[2] = 2*config->frame_size; // config->offsets[3] = 3*config->frame_size; for (i = 1; i < config->num_frames+1; i++) config->offsets[i] = i*config->frame_size; config->offset.y=0; config->offset.v=((sw + 31) & ~31) * sh; config->offset.u=config->offset.v+((sw + 31) & ~31) * sh /4; //FIXME figure out a better way to allocate memory on card //allocate 2 megs //mga_src_base = mga_mem_base + (MGA_VIDMEM_SIZE-2) * 0x100000; //mga_src_base = (MGA_VIDMEM_SIZE-3) * 0x100000; /* for G200 set Interleaved UV planes */ if (!is_g400) config->flags = VID_PLAY_INTERLEAVED_UV | INTERLEAVING_UV; //Setup the BES registers for a three plane 4:2:0 video source regs.besglobctl = 0; switch(config->fourcc) { case IMGFMT_YV12: case IMGFMT_I420: case IMGFMT_IYUV: regs.besctl = 1 // BES enabled + (0<<6) // even start polarity + (1<<10) // x filtering enabled + (1<<11) // y filtering enabled + (1<<16) // chroma upsampling + (1<<17) // 4:2:0 mode + (1<<18); // dither enabled#if 0 if(is_g400) { //zoom disabled, zoom filter disabled, 420 3 plane format, proc amp //disabled, rgb mode disabled regs.besglobctl = (1<<5); } else { //zoom disabled, zoom filter disabled, Cb samples in 0246, Cr //in 1357, BES register update on besvcnt regs.besglobctl = 0; }#endif break; case IMGFMT_YUY2: regs.besctl = 1 // BES enabled + (0<<6) // even start polarity + (1<<10) // x filtering enabled + (1<<11) // y filtering enabled + (1<<16) // chroma upsampling + (0<<17) // 4:2:2 mode + (1<<18); // dither enabled regs.besglobctl = 0; // YUY2 format selected break; case IMGFMT_UYVY: regs.besctl = 1 // BES enabled + (0<<6) // even start polarity + (1<<10) // x filtering enabled + (1<<11) // y filtering enabled + (1<<16) // chroma upsampling + (0<<17) // 4:2:2 mode + (1<<18); // dither enabled regs.besglobctl = 1<<6; // UYVY format selected break; } //Disable contrast and brightness control regs.besglobctl |= (1<<5) + (1<<7); // we want to preserver these across restarts //regs.beslumactl = (0x0 << 16) + 0x80; //Setup destination window boundaries besleft = x > 0 ? x : 0; bestop = y > 0 ? y : 0; regs.beshcoord = (besleft<<16) + (x + dw-1); regs.besvcoord = (bestop<<16) + (y + dh-1); //Setup source dimensions regs.beshsrclst = (sw - 1) << 16; regs.bespitch = (sw + 31) & ~31 ; //Setup horizontal scaling ifactor = ((sw-1)<<14)/(dw-1); ofsleft = besleft - x; regs.beshiscal = ifactor<<2; regs.beshsrcst = (ofsleft*ifactor)<<2; regs.beshsrcend = regs.beshsrcst + (((dw - ofsleft - 1) * ifactor) << 2); //Setup vertical scaling ifactor = ((sh-1)<<14)/(dh-1); ofstop = bestop - y; regs.besviscal = ifactor<<2; baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch; //frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2; regs.besa1org = (uint32_t) mga_src_base + baseadrofs; regs.besa2org = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size; regs.besb1org = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size; regs.besb2org = (uint32_t) mga_src_base + baseadrofs + 3*config->frame_size; if (config->fourcc == IMGFMT_YV12 || config->fourcc == IMGFMT_IYUV || config->fourcc == IMGFMT_I420) { // planar YUV frames: if (is_g400) baseadrofs = (((ofstop*regs.besviscal)/4)>>16)*regs.bespitch; else baseadrofs = (((ofstop*regs.besviscal)/2)>>16)*regs.bespitch; if (config->fourcc == IMGFMT_YV12){ regs.besa1corg = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; regs.besa2corg = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size + regs.bespitch * sh; regs.besb1corg = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size + regs.bespitch * sh; regs.besb2corg = (uint32_t) mga_src_base + baseadrofs + 3*config->frame_size + regs.bespitch * sh; regs.besa1c3org = regs.besa1corg + ((regs.bespitch * sh) / 4); regs.besa2c3org = regs.besa2corg + ((regs.bespitch * sh) / 4); regs.besb1c3org = regs.besb1corg + ((regs.bespitch * sh) / 4); regs.besb2c3org = regs.besb2corg + ((regs.bespitch * sh) / 4); } else { regs.besa1c3org = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; regs.besa2c3org = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size + regs.bespitch * sh; regs.besb1c3org = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size + regs.bespitch * sh; regs.besb2c3org = (uint32_t) mga_src_base + baseadrofs + 3*config->frame_size + regs.bespitch * sh; regs.besa1corg = regs.besa1c3org + ((regs.bespitch * sh) / 4); regs.besa2corg = regs.besa2c3org + ((regs.bespitch * sh) / 4); regs.besb1corg = regs.besb1c3org + ((regs.bespitch * sh) / 4); regs.besb2corg = regs.besb2c3org + ((regs.bespitch * sh) / 4); }?? 快捷鍵說明
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