?? mstar.lst
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480 2 msWriteByte( BK0_83_DELTA_L, 0 );
481 2 msWriteByte( BK0_84_DELTA_H, 0 );
482 2 //should turn off in VGA mode,we don't support YPBPR here
483 2 //msLPFCtl(LPF_CTL_ANALOG_PORT);
484 2 msLPFCtl(LPF_CTL_TURN_OFF);
485 2 msWriteRegsTbl(tProgVGAPort); // program VGA port
486 2 }
487 1 else // CVBS/SV/CCIR656
488 1 #endif
489 1 {
C51 COMPILER V8.01 MSTAR 11/28/2006 08:08:06 PAGE 10
490 2 msWriteByte(BK0_0D_LYL, 0x07);
491 2
492 2 msWriteByte(BK0_10_COCTRL1,COCTRL1_VALUE);
*** ERROR C202 IN LINE 492 OF ..\..\KERNAL\MSTAR.C: 'COCTRL1_VALUE': undefined identifier
493 2 if( IsVideoPortInUse())
494 2 {
495 3 //msWriteByte( BK0_00_REGBK, REG_BANK3_COMB );
496 3 //msWriteBit( BK3_11_COMBCFGB, 1, _BIT5 ); // Patch IC
497 3
498 3 msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU );
499 3 msWriteByte( BK1_24, 0x40 );
500 3 msWriteByte( BK1_25, 0x01 ); // FPLL_DIVN => Divide by 2
501 3 msWriteByte( BK1_29, 0x1F ); // 20051007
502 3 msWriteByte( BK1_2C, 0xF0 ); // 20050624 David.Shen: I clamp
503 3
504 3 // Reset ADC register for internal VD
505 3 msWriteByte( BK1_04_RGAIN_ADC, 0x80);
506 3 msWriteByte( BK1_05_GGAIN_ADC, 0x80);
507 3 msWriteByte( BK1_06_BGAIN_ADC, 0x80);
508 3 msWriteByte( BK1_07_ROFFS_ADC, 0x80);
509 3 msWriteByte( BK1_08_GOFFS_ADC, 0x80);
510 3 msWriteByte( BK1_09_BOFFS_ADC, 0x80);
511 3 msWriteByte( BK1_18_CALEN, 0);
512 3
513 3 //if( g_ucmsVDCtl&MSVD_CTL_FLAG_NOISE_HANDLER )
514 3 msVDNoiseHandlerReset();
515 3
516 3 if( IsCVBSInUse())
517 3 {
518 4 msWriteRegsTbl(tProgMsAvPort); // program CVBS port
519 4 msWriteByte(BK0_00_REGBK, REG_BANK2_VD);
520 4 msWriteByteMask(BK2_1A_SVD_EN, 0x00, 0xC0); // Disable SV
521 4 msWriteBit(BK2_1F, 0, _BIT7); // Disable clamp C
522 4 msWriteByte(BK2_7F,0x63);
523 4 msWriteByte(BK0_00_REGBK, REG_BANK3_COMB);
524 4 msWriteBit(BK3_10_COMBCFGA, 0, _BIT7); // Enable comb filter
525 4 msWriteBit(BK3_A1_SCM_IDSET1, 0, _BIT3); // Disable Secam-SV
526 4 }
527 3 else if( IsSVideoInUse())
528 3 {
529 4 msWriteRegsTbl(tProgMsSvPort); // program SV port
530 4 msWriteByte(BK0_00_REGBK, REG_BANK2_VD);
531 4 msWriteByteMask(BK2_1A_SVD_EN, 0xC0, 0xC0); // Enable SV
532 4 msWriteBit(BK2_1F, 1, _BIT7); // Enable clamp C
533 4 msWriteByte(BK2_7F,0x62);
534 4 msWriteByte(BK0_00_REGBK, REG_BANK3_COMB);
535 4 msWriteBit(BK3_10_COMBCFGA, 1, _BIT7); // Bypass comb
536 4 msWriteBit(BK3_A1_SCM_IDSET1, 1, _BIT3); // Disable Secam-SV
537 4 }
538 3 msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
539 3
540 3 msVDCombLineBufferCtl( MSVD_COMB_LINE_BUFFER_CTL_HW_AUTO );
541 3
542 3 #if TV_ENABLE
543 3 if( IsTVInUse() )
544 3 {
545 4 hw_SetTunerOn();
546 4 #if(!ENABLE_VCR_HANDLER)
547 4 msWriteByte(BK0_00_REGBK, REG_BANK2_VD);
548 4 msWriteByteMask(BK2_6A_VCR_DETECT1, 0x80, 0xC0); // 20051128.Eric.Lin: Force non-VCR mode
549 4 #endif
550 4
C51 COMPILER V8.01 MSTAR 11/28/2006 08:08:06 PAGE 11
551 4 msWriteByte(BK0_00_REGBK, REG_BANK3_COMB);
552 4 //msWriteByte( BK3_2F, 0x00 ); // IF_COEF for tuner input
553 4 msWriteByte(BK3_24_TH2DHOR, 0x0A); // C-Trap disable: For PAL-DEM
554 4 msWriteByteMask(BK3_21_COMB2DCFGB, 0x00, 0x08); //
555 4 }
556 3 else
557 3 #endif
558 3 {
559 4 hw_SetTunerOff();
560 4 #if(!ENABLE_VCR_HANDLER)
561 4 msWriteByte(BK0_00_REGBK, REG_BANK2_VD);
562 4 msWriteByteMask(BK2_6A_VCR_DETECT1, 0x40, 0xC0); // 20051128.Eric.Lin: Auto VCR mode
563 4 #endif
564 4 msWriteByte(BK0_00_REGBK, REG_BANK3_COMB);
565 4 //msWriteByte( BK3_2F, 0x00 );
566 4 msWriteByte(BK3_24_TH2DHOR, 0x20); // C-Trap disable: For PAL-DEM
567 4 msWriteByteMask(BK3_21_COMB2DCFGB, 0x08, 0x08); //
568 4 }
569 3 msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
570 3 }
571 2 }
572 1
573 1 msLineBufferDelayCtl( 0 ); // For Change source
574 1
575 1 /*
576 1 if(!IsVGAInUse())
577 1 msFieldDetectCtl();
578 1
579 1 #if SOG_ENABLE
580 1 msFieldDetectCtl();
581 1 #endif
582 1 */
583 1 msFieldDetectCtl();
584 1
585 1 if( IsVideoPortInUse())
586 1 {
587 2 #if(ENABLE_VD_DSP)
588 2 //g_ucmsVDCtl |= MSVD_CTL_FLAG_VSYNC;
589 2 #endif
590 2 msVDReset(); // When change source
591 2 }
592 1 else
593 1 {
594 2 #if(ENABLE_VD_DSP)
595 2 //g_ucmsVDCtl &= (~MSVD_CTL_FLAG_VSYNC);
596 2 VD_DSP_Ctl( _DISABLE, 525 ); // Disable DSP
597 2 #endif
598 2
599 2 //if( g_ucmsVDCtl2&MSVD_CTL2_FLAG_AGC_PROCESSOR )
600 2 VD_AGC_Ctl( 0 ); // Disable SW AGC
601 2 }
602 1
603 1 msSetUserPref();
604 1 msWriteByte( BK0_00_REGBK, REG_BANK_SCALER);
605 1 }
606 //*******************************************************************
607 // Function Name: msPowerUp
608 //
609 // Decscription: Power on chip from power down mode
610 //
611 // callee: msWriteByte() in ms_rwreg.c
612 //
C51 COMPILER V8.01 MSTAR 11/28/2006 08:08:06 PAGE 12
613 // caller: Power_PowerOnSystem() in power.c
614 //*******************************************************************
615 void msPowerUp(void)
616 {
617 1 msWriteByte(BK0_21_PLLCTRL2, 0); // power on master & output PLL
618 1 msWriteByte(BK0_E2_SWRST0, OP2R_B|ADCR_B); // reset graphic port RO register
619 1 msWriteByte(BK0_E2_SWRST0, 0);
620 1
621 1 ChipPowerUpcontrol();
622 1
623 1 Delay1ms(5);//(50);
624 1 msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU); // switch to Bank 1
625 1
626 1 #if PANEL_ANALOG_TCON
627 1 msWriteByte(BK1_A9_PD_VDAC, 0x00);
628 1 #else
msWriteByte(BK1_4C, 0x5F);
#endif
631 1
632 1 msWriteByte(BK0_00_REGBK, REG_BANK_SCALER); // switch to Bank 0
633 1 Delay1ms(5);//(50);
634 1 msWriteByte(BK0_F4_TRISTATE, 0);
635 1
636 1 #if ENABLE_MCU_USE_INTERNAL_CLOCK
637 1 if( g_bMcuUseNewClock == 0 )
638 1 McuUseInternalClock();
639 1 #endif
640 1 }
641
642 ///////////////////////////////////////////////////////////////////////////////
643 // <Function>: msSoftwareReset
644 //
645 // <Description>: MST chip software reset.
646 //
647 // <Parameter>: - <Flow> - <Description>
648 //-----------------------------------------------------------------------------
649 // ucParam - In - Software reset parameter
650 // ucDelayTime - In - Delay time(unit: 1ms)
651 ///////////////////////////////////////////////////////////////////////////////
652 void msSoftwareReset(BYTE wParam, BYTE ucDelayTime)
653 {
654 1 msWriteByte(BK0_E2_SWRST0, wParam);
655 1 Delay1ms(ucDelayTime);
656 1 msWriteByte(BK0_E2_SWRST0, 0x00);
657 1 }
658
659 //*******************************************************************
660 // Function Name: msPowerDown
661 //
662 // Decscription: Power down chip
663 //
664 // callee: msWriteByte() in ms_rwreg.c
665 //
666 // caller: Power_PowerOffSystem() in power.c
667 //*******************************************************************
668 void msPowerDown(void)
669 {
670 1 BYTE ucBank;
671 1 ucBank = msReadByte(BK0_00_REGBK);
672 1 msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
673 1 #if ENABLE_MCU_USE_INTERNAL_CLOCK
674 1 msWriteByte(BK0_EE_PDMD2, 0 );
C51 COMPILER V8.01 MSTAR 11/28/2006 08:08:06 PAGE 13
675 1 g_bMcuUseNewClock = 0;
676 1 #endif
677 1
678 1 msWriteByte(BK0_F4_TRISTATE, 0xFF);
679 1 msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU); // switch to Bank 1
680 1 msWriteByte(BK1_31, 0x7F);
681 1 msWriteByte(BK1_32, 0xFF);
682 1
683 1 msWriteByte(BK1_45, 0x01);
684 1
685 1 #if PANEL_ANALOG_TCON
686 1 msWriteByte(BK1_A9_PD_VDAC, 0x0F);
687 1 #else
msWriteByte(BK1_4C, 0x5F);
#endif
690 1
691 1 msWriteByte(BK0_00_REGBK, REG_BANK_SCALER); // switch to Bank 0
692 1 msWriteByte(BK0_E0_PDMD0, 0xB0);
693 1 msWriteByte(BK0_E1_PDMD1, 0xFF);
694 1
695 1 msWriteByte(BK0_00_REGBK, ucBank);
696 1
697 1 TH1 = TIMER1_MODE2_TH1; // set timer1(buad rate)
698 1 TR1 = 1; // timer1 run
699 1 PX1 = 1; // set INT1 priority high //Nicolee 20051231 add for low power mode ir power on set
700 1
701 1 #if(IR_FORMAT == IR_RC5)
PT2 = 1;
#endif
704 1 }
705
706 void LoadGammaTbl(void)
707 {
708 1 BYTE i;
709 1 BYTE count;
710 1
711 1 msWriteByte(BK0_91_GAMMA_ADR_PORT,0x00);
712 1 msWriteByte(BK0_90_GAMMA_EN,msReadByte(BK0_90_GAMMA_EN)|_BIT1);
713 1 for (i=0;i<3;i++)
714 1 {
715 2 for(count=0;count<33;count++)
716 2 msWriteByte(BK0_92_GAMMA_DAT_PORT,tGammaTableNormal[i][count]);
717 2 }
718 1 }
719
720 void msInitGamma(void)
721 {
722 1 msWriteByte(BK0_90_GAMMA_EN, GAMMA_EN_B);
723 1 LoadGammaTbl();
724 1 }
725
726 void SystemDelay_translate_To_Dsp_Processor(BYTE wDelaycount)
727 {
728 1 BYTE i;
729 1 for( i = 0; i < wDelaycount; i ++ )
730 1 {
731 2 Delay1ms(10);
732 2 #if( ENABLE_VD_DSP&&((DSP_RUN_MODE == DSP_RUN_MODE_POLLING)||(DSP_RUN_MODE == DSP_RUN_MODE_TIMER_AND_POLL
-ING)) )
733 2 //if( g_ucmsVDCtl & MSVD_CTL_FLAG_VSYNC )
734 2 {
735 3 VD_DSP();
C51 COMPILER V8.01 MSTAR 11/28/2006 08:08:06 PAGE 14
736 3 }
737 2 #endif
738 2 }
739 1 }
740
741
742 WORD GetStdModeHFreq( BYTE ucModeIdx )
743 {
744 1 return tStandardMode[ucModeIdx].HFreq;
745 1 }
746
747
748 WORD GetStdModeHTotal( BYTE ucModeIdx )
749 {
750 1 if (tStandardModeResolution[tStandardMode[ucModeIdx].ResIndex].DispWidth < PanelWidth)
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