?? cs5532_test.lst
字號:
__text_start:
__start:
002A E5CF LDI R28,0x5F
002B E0D4 LDI R29,4
002C BFCD OUT 0x3D,R28
002D BFDE OUT 0x3E,R29
002E 51C0 SUBI R28,0x10
002F 40D0 SBCI R29,0
0030 EA0A LDI R16,0xAA
0031 8308 STD Y+0,R16
0032 2400 CLR R0
0033 E6E0 LDI R30,0x60
0034 E0F0 LDI R31,0
0035 E010 LDI R17,0
0036 39E6 CPI R30,0x96
0037 07F1 CPC R31,R17
0038 F011 BEQ 0x003B
0039 9201 ST R0,Z+
003A CFFB RJMP 0x0036
003B 8300 STD Z+0,R16
003C E5E4 LDI R30,0x54
003D E0F0 LDI R31,0
003E E6A0 LDI R26,0x60
003F E0B0 LDI R27,0
0040 E010 LDI R17,0
0041 35E4 CPI R30,0x54
0042 07F1 CPC R31,R17
0043 F021 BEQ 0x0048
0044 95C8 LPM
0045 9631 ADIW R30,1
0046 920D ST R0,X+
0047 CFF9 RJMP 0x0041
0048 940E004B CALL _main
_exit:
004A CFFF RJMP _exit
FILE: G:\CS5532\firmware\main.c
(0001) /*******************************************************************************
(0002) Copyright (C), 1988-2007 GSProg
(0003) File name: Main.c
(0004) Author: ilan2003 Version:1.0 Date: 2007-10-11
(0005) Description:
(0006) MCU Name : mega16
(0007) Frequency : 7.3728.0MHZ
(0008) Baudrate :
(0009) IDE : ICCAVR6.31
(0010) ProjectName : CS5532讀寫模塊
(0011) ModuleName :
(0012) Others:
(0013) Function List:
(0014) 1. void main(void);
(0015)
(0016)
(0017)
(0018) ********************************************************************************/
(0019) #include <iom16v.h>
(0020) #include <macros.h>
(0021)
(0022) #include "CS5532.H"
(0023) #include "DEFINE.H"
(0024) #include "UART.H"
(0025) #include "INITIAL.H"
(0026) #include "DELAY.H"
(0027)
(0028)
(0029)
(0030)
(0031) void main(void)
(0032) {
(0033) all_init();
_main:
004B 940E026A CALL _all_init
004D C00F RJMP 0x005D
(0034)
(0035) while(1)
(0036) {
(0037) ms_delay(10);
004E E00A LDI R16,0xA
004F 940E0281 CALL _ms_delay
(0038) ms_delay(50);
0051 E302 LDI R16,0x32
0052 940E0281 CALL _ms_delay
(0039) ms_delay(100);
0054 E604 LDI R16,0x64
0055 940E0281 CALL _ms_delay
(0040) ms_delay(150);
0057 E906 LDI R16,0x96
0058 940E0281 CALL _ms_delay
(0041) ms_delay(200);
005A EC08 LDI R16,0xC8
005B 940E0281 CALL _ms_delay
005D CFF0 RJMP 0x004E
005E 9508 RET
_cs5532_wr_byte:
i --> R20
dat --> R16
005F 940E029F CALL push_gset1
FILE: G:\CS5532\firmware\cs5532.c
(0001) /****************************************Copyright (c)**************************************************
(0002) **
(0003) **
(0004) **
(0005) ** 文 件 名: ca5532.c
(0006) ** 最后修改日期: 2007-10-8 9:40
(0007) ** 描 述: cs5532驅動程序
(0008) ** 版 本: V1.0
(0009) ** 主 控 芯 片:M16 晶振頻率:7.37MHZ,
(0010) ** IDE:ICCAVR 6.31
(0011) **********************************************************************************************************/
(0012) #include <iom16v.h>
(0013) #include <macros.h>
(0014)
(0015) #include "DEFINE.H"
(0016) #include "CS5532.H"
(0017) #include "DELAY.H"
(0018)
(0019) uint08 cs5532_buf[4];
(0020)
(0021)
(0022) /**********************************************************************
(0023) functionName:void cs5532_wr_byte(uint08 dat)
(0024) description:
(0025) **********************************************************************/
(0026) void cs5532_wr_byte(uint08 dat)
(0027) {
(0028) uint08 i;
(0029)
(0030) for(i=0;i<8;i++)
0061 2744 CLR R20
0062 C00E RJMP 0x0071
(0031) {
(0032) if(dat&0x80)
0063 FF07 SBRS R16,7
0064 C002 RJMP 0x0067
(0033) SET_SDI();
0065 9AD8 SBI 0x1B,0
0066 C001 RJMP 0x0068
(0034) else
(0035) CLR_SDI();
0067 98D8 CBI 0x1B,0
(0036) NOP();NOP();
0068 0000 NOP
0069 0000 NOP
(0037) SET_SCK();
006A 9AD9 SBI 0x1B,1
(0038) NOP();NOP();
006B 0000 NOP
006C 0000 NOP
(0039) CLR_SCK();
006D 98D9 CBI 0x1B,1
(0040) dat<<=1;
006E 0F00 LSL R16
(0041) NOP();
006F 0000 NOP
0070 9543 INC R20
0071 3048 CPI R20,0x8
0072 F380 BCS 0x0063
(0042) }
(0043) SET_SDI();
0073 9AD8 SBI 0x1B,0
0074 940E02A2 CALL pop_gset1
0076 9508 RET
(0044) }
(0045)
(0046)
(0047)
(0048)
(0049)
(0050) /**********************************************************************
(0052) description:
(0053) **********************************************************************/
(0054) uint08 cs5532_rd_byte(void)
(0055) {
(0056) uint08 i;
(0057) uint08 temp=0;
_cs5532_rd_byte:
temp --> R16
i --> R18
0077 2700 CLR R16
(0058)
(0059) for(i=0;i<8;i++)
0078 2722 CLR R18
0079 C00A RJMP 0x0084
(0060) {
(0061) temp<<=1;
007A 0F00 LSL R16
(0062) SET_SCK();
007B 9AD9 SBI 0x1B,1
(0063) NOP();NOP();
007C 0000 NOP
007D 0000 NOP
(0064) if(STU_SDO)
(0065) temp|=1;
007E 6001 ORI R16,1
(0066) CLR_SCK();
007F 98D9 CBI 0x1B,1
(0067) NOP();NOP();NOP();
0080 0000 NOP
0081 0000 NOP
0082 0000 NOP
0083 9523 INC R18
0084 3028 CPI R18,0x8
0085 F3A0 BCS 0x007A
(0068) }
(0069) return temp;
0086 9508 RET
_cs5532_soft_rst:
i --> R20
0087 940E029F CALL push_gset1
(0070) }
(0071)
(0072)
(0073) /**********************************************************************
(0074) functionName:void cs5532_soft_rst(void)
(0075) description:
(0076) **********************************************************************/
(0077) void cs5532_soft_rst(void)
(0078) {
(0079) uint08 i;
(0080) for(i=0;i<15;i++)
0089 2744 CLR R20
008A C003 RJMP 0x008E
(0081) {
(0082) cs5532_wr_byte(0xFF);
008B EF0F LDI R16,0xFF
008C DFD2 RCALL _cs5532_wr_byte
008D 9543 INC R20
008E 304F CPI R20,0xF
008F F3D8 BCS 0x008B
(0083) }
(0084) cs5532_wr_byte(0xFE);
0090 EF0E LDI R16,0xFE
0091 DFCD RCALL _cs5532_wr_byte
0092 940E02A2 CALL pop_gset1
0094 9508 RET
_cs5532_wr_reg:
temp --> Y+0
dat --> Y+6
cmd --> R20
0095 933A ST R19,-Y
0096 932A ST R18,-Y
0097 940E029F CALL push_gset1
0099 2F40 MOV R20,R16
009A 9724 SBIW R28,4
(0085) }
(0086)
(0087)
(0088) /**********************************************************************
(0089) functionName:
(0090) description:
(0091) **********************************************************************/
(0092) void cs5532_wr_reg(uint08 cmd,uint32 dat)
(0093) {
(0094) uint08 temp[4];
(0095) temp[0]=dat>>24;
009B E188 LDI R24,0x18
009C E090 LDI R25,0
009D 01FE MOVW R30,R28
009E 8026 LDD R2,Z+6
009F 8037 LDD R3,Z+7
00A0 8440 LDD R4,Z+8
00A1 8451 LDD R5,Z+9
00A2 938A ST R24,-Y
00A3 0181 MOVW R16,R2
00A4 0192 MOVW R18,R4
00A5 940E02B6 CALL lsr32
00A7 8308 STD Y+0,R16
(0096) temp[1]=dat>>16;
00A8 01FE MOVW R30,R28
00A9 8026 LDD R2,Z+6
00AA 8037 LDD R3,Z+7
00AB 8440 LDD R4,Z+8
00AC 8451 LDD R5,Z+9
00AD 0112 MOVW R2,R4
00AE 2444 CLR R4
00AF 2455 CLR R5
00B0 8229 STD Y+1,R2
(0097) temp[2]=dat>>8;
00B1 E088 LDI R24,0x8
00B2 E090 LDI R25,0
00B3 01FE MOVW R30,R28
00B4 8026 LDD R2,Z+6
00B5 8037 LDD R3,Z+7
00B6 8440 LDD R4,Z+8
00B7 8451 LDD R5,Z+9
00B8 938A ST R24,-Y
00B9 0181 MOVW R16,R2
00BA 0192 MOVW R18,R4
00BB 940E02B6 CALL lsr32
00BD 830A STD Y+2,R16
(0098) temp[3]=dat;
00BE 01FE MOVW R30,R28
00BF 8026 LDD R2,Z+6
00C0 8037 LDD R3,Z+7
00C1 8440 LDD R4,Z+8
00C2 8451 LDD R5,Z+9
00C3 822B STD Y+3,R2
(0099) cs5532_wr_byte(cmd);
00C4 2F04 MOV R16,R20
00C5 DF99 RCALL _cs5532_wr_byte
(0100) cs5532_wr_byte(temp[0]);
00C6 8108 LDD R16,Y+0
00C7 DF97 RCALL _cs5532_wr_byte
(0101) cs5532_wr_byte(temp[1]);
00C8 8109 LDD R16,Y+1
00C9 DF95 RCALL _cs5532_wr_byte
(0102) cs5532_wr_byte(temp[2]);
00CA 810A LDD R16,Y+2
00CB DF93 RCALL _cs5532_wr_byte
(0103) cs5532_wr_byte(temp[3]);
00CC 810B LDD R16,Y+3
00CD DF91 RCALL _cs5532_wr_byte
00CE 9624 ADIW R28,4
00CF 940E02A2 CALL pop_gset1
00D1 9622 ADIW R28,2
00D2 9508 RET
_cs5532_rd_reg:
cmd --> R20
00D3 940E029F CALL push_gset1
00D5 2F40 MOV R20,R16
(0104) }
(0105)
(0106)
(0107)
(0108) /**********************************************************************
(0109) functionName:void cs5532_rd_reg(uint08 cmd)
(0110) description:
(0111) **********************************************************************/
(0112) void cs5532_rd_reg(uint08 cmd)
(0113) {
(0114) cs5532_wr_byte(cmd);
00D6 2F04 MOV R16,R20
00D7 DF87 RCALL _cs5532_wr_byte
(0115) cs5532_buf[0]=cs5532_rd_byte();
00D8 DF9E RCALL _cs5532_rd_byte
00D9 93000060 STS cs5532_buf,R16
(0116) cs5532_buf[1]=cs5532_rd_byte();
00DB DF9B RCALL _cs5532_rd_byte
00DC 93000061 STS cs5532_buf+1,R16
(0117) cs5532_buf[2]=cs5532_rd_byte();
00DE DF98 RCALL _cs5532_rd_byte
00DF 93000062 STS cs5532_buf+2,R16
(0118) cs5532_buf[3]=cs5532_rd_byte();
00E1 DF95 RCALL _cs5532_rd_byte
00E2 93000063 STS cs5532_buf+3,R16
00E4 940E02A2 CALL pop_gset1
00E6 9508 RET
(0119) }
(0120)
(0121)
(0122) /**********************************************************************
(0123) functionName:
(0124) description:
(0125) **********************************************************************/
(0126) void cs5532_init(void)
(0127) {
(0128) ms_delay(50); //等待電源穩定
_cs5532_init:
00E7 E302 LDI R16,0x32
00E8 940E0281 CALL _ms_delay
(0129) cs5532_soft_rst(); //軟件復位
00EA DF9C RCALL _cs5532_soft_rst
00EB 9508 RET
FILE: G:\CS5532\firmware\uart.c
(0001) /****************************************Copyright (c)**************************************************
(0002) **
(0003) **
(0004) **
(0005) ** 文 件 名: uart.c
(0006) ** 最后修改日期: 2007-10-8
(0007) ** 描 述: rs232通訊函數
(0008) ** 版 本: V1.0
(0009) ** 主 控 芯 片:M16 晶振頻率:7.37MHZ, 波特率19200
(0010) ** IDE:ICCAVR 6.31
(0011) **********************************************************************************************************/
(0012)
(0013) #define MCU_M16
(0014) #define MCLK737
(0015)
(0016)
(0017) #ifdef MCU_M8
(0018) #include <iom8v.h>
(0019) #endif
(0020)
(0021) #ifdef MCU_M16
(0022) #include <iom16v.h>
(0023) #endif
(0024)
(0025) #include <macros.h>
(0026) #include "DEFINE.H"
(0027) #include "UART.H"
(0028) #include "COMMAND.H"
(0029)
(0030)
(0031) uint08 uart_tx_buf[UART_BUF_SIZE]; //發送緩沖
(0032) uint08 uart_tx_wr_ptr,uart_tx_rd_ptr;
(0033) uint08 uart_rx_counter,uart_tx_counter;
(0034) uint08 uart_rx_buf[UART_BUF_SIZE]; //接收緩沖，相當于消息體
(0035) uint08 seq_number; //順序數
(0036) uint08 check_sum; //和校驗
(0037) uint08 rx_stu_mac; //接收狀態機
(0038) uint08 msg_end_flag; //消息體結束標志
(0039) uint16 msg_size; //消息尺寸
(0040)
(0041)
(0042) /**********************************************************************
(0043) functionName:void uart_init(void)
(0044) description:uart初始化
(0045) **********************************************************************/
(0046) void uart_init(void)
(0047) {
(0048) //IO初始化
(0049) SET_BIT(PORTD,PD0);
_uart_init:
00EC 9A90 SBI 0x12,0
(0050) SET_BIT(PORTD,PD1);
00ED 9A91 SBI 0x12,1
(0051) SET_BIT(DDRD,PD1);
00EE 9A89 SBI 0x11,1
(0052) CLR_BIT(DDRD,PD0);
00EF 9888 CBI 0x11,0
(0053)
(0054) //寄存器初始化
(0055) UCSRB = 0x00;
00F0 2422 CLR R2
00F1 B82A OUT 0x0A,R2
(0056) UCSRA = 0x00;
00F2 B82B OUT 0x0B,R2
(0057) UCSRC = 0x86;
00F3 E886 LDI R24,0x86
00F4 BD80 OUT 0x20,R24
(0058) UBRRL = BAUD19200; //設置撥特率
00F5 E187 LDI R24,0x17
00F6 B989 OUT 0x09,R24
(0059) UBRRH = 0x00; //set baud rate hi
00F7 BC20 OUT 0x20,R2
(0060) UCSRB = 0x98; //使用中斷
00F8 E988 LDI R24,0x98
00F9 B98A OUT 0x0A,R24
(0061)
(0062) //變量初始化
(0063) uart_tx_wr_ptr=uart_tx_rd_ptr=0;
00FA 92200080 STS uart_tx_rd_ptr,R2
00FC 92200081 STS uart_tx_wr_ptr,R2
(0064) uart_rx_counter=uart_tx_counter=0;
00FE 9220007E STS uart_tx_counter,R2
0100 9220007F STS uart_rx_counter,R2
(0065) msg_end_flag=0; //表示沒有接收到數據
0102 92200066 STS msg_end_flag,R2
(0066) rx_stu_mac=ST_START;
0104 EF80 LDI R24,0xF0
0105 93800067 STS rx_stu_mac,R24
0107 9508 RET
_uart0_rx_isr:
uart_data --> R16
0108 922A ST R2,-Y
0109 923A ST R3,-Y
010A 924A ST R4,-Y
010B 925A ST R5,-Y
010C 930A ST R16,-Y
010D 932A ST R18,-Y
010E 933A ST R19,-Y
010F 938A ST R24,-Y
0110 939A ST R25,-Y
0111 93EA ST R30,-Y
0112 93FA ST R31,-Y
0113 B62F IN R2,0x3F
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