__wW99AVPCRLow=0x6801;	// Chuan0.81, Reset Servo for Testtool            __wW99AVPCRHigh=0x0004;#else            switch (__bCurrentIF)            {            case BITSTREAM_DVDIF :                __wW99AVPCRLow = 0x6002 ;                __wW99AVPCRHigh = 0x0004 ;                break ;            case BITSTREAM_CDIF :                //__wW99AVPCRLow=0x6800;                // TCC274j, set DVDSEL=1 or GP4,5 can't use                __wW99AVPCRLow=0x6802;                __wW99AVPCRHigh=0x0004;                break ;            case BITSTREAM_ATAPIIF :            default:                __wW99AVPCRLow = 0x6c00;                __wW99AVPCRHigh = 0x124 ;                break ;            }#endif            if (__bVersionMPEG==VERSION_BE) //Kevin1.24-3, < BE will Wait No Ack when H/W power on if SETUP_AUDIO_DIGITAL_OUT_OFF            {                //Kevin1.07f, update __wW99AVPCRHigh. Otherwise, PCR[21] will always be cleared                 if(__SetupInfo.bAudioDigitalOut==SETUP_AUDIO_DIGITAL_OUT_OFF) //_bSpDifMode will be set later in CHIPS_Initial(CHIPS_INIT_ALL)                    __wW99AVPCRHigh |= SPDIF_OFF;                 else                    __wW99AVPCRHigh &= ~SPDIF_OFF;            }               else if (__bVersionMPEG==VERSION_CA) //Kevin2.27            {                if(__SetupInfo.bAudioDigitalOut==SETUP_AUDIO_DIGITAL_OUT_OFF)                    __wW99AVPCRHigh &= ~SPDIF_OFF; //[21] 1: turn on SPDIF, 0: turn off SPDIF                 else                    __wW99AVPCRHigh |= SPDIF_OFF;                  __wW99AVPCRHigh |= 0x0008;  //PCR[19]: SPDIF pad output enable                                            //PCR[20]: SPDIF reset            }                                        //TCC019, must enable atapi or waitstable will fail                W99AV_WriteRegDW(PCR, __wW99AVPCRLow, __wW99AVPCRHigh);  // normal state                            //Kevin1.25, move above to fix "wait no DSP ACK" when power on for AD/AC since 1.24            //}            // DVD016-1, initialize DM after reset audio            // if don't issue it, write DM will fail            // TCC0411, don't call this as it cause pcm ws change and result in audio noise. InitialVideo will call this.            __dwW99AVCmdArg[1]=CMDARG_DSP_INIT;//Kevin0.81, modify//#ifdef  SUPPORT_PCM_ADDRESS_SETTING_BY_FIRMWARE#if 0            __dwW99AVCmdArg[0]=3;            __dwW99AVCmdArg[2]=W99AV_ADDR_PCMBUFF;  // Chuan2.80p, set PCM Buffer.            __dwW99AVCmdArg[3]=0;  // Chuan2.80p, PCM2 addr same as above.#else            __dwW99AVCmdArg[0]=1;#endif            W99AV_CommandN (COMMAND_DSP_INIT);  // DSP init            // LLY.047, restore OSD_TOP/BOTTOM_ADDR & OSD_TOP/BOTTOM_SIZE            // by global variables            W99AV_WriteDRAMData( W99AV_DRAM_OSDT_ADR, _dwTopAddr );            W99AV_WriteDRAMData( W99AV_DRAM_OSDT_SIZE, _dwTopSize );            W99AV_WriteDRAMData( W99AV_DRAM_OSDB_ADR, _dwBottomAddr );            W99AV_WriteDRAMData( W99AV_DRAM_OSDB_SIZE, _dwBottomSize );            __wW99AVVCRLow |= 0x00000040;  // enable OSD_EN in VCR            // LLY.050, issue SVC2 command instead of "write REG command"            // because some info. must tell RISC by "SVC2" command            //W99AV_WriteRegDW(VCR, __wW99AVVCRLow, __wW99AVVCRHigh);            __dwW99AVCmdArg [0] = 2 ;            __dwW99AVCmdArg [1] = CMDARG_SVC2 ;            __dwW99AVCmdArg [2] = MAKELONG (__wW99AVVCRLow, __wW99AVVCRHigh) ;            W99AV_CommandN (COMMAND_SVC2) ;            // LLY0.85-2, issue Set A/V buffer size command to force enable VINT            // Otherwise, OINT can't work. So, GXA command will hang !!            __dwW99AVCmdArg[1]=0xFFFF; // don't care            __dwW99AVCmdArg[2]=W99AV_ADDR_VBUFF;  // video buffer size range            __dwW99AVCmdArg[3]=W99AV_ADDR_ABUFF;   // audio buffer size range            // Keep audio buffer 2 address status flag            // '0': same as audio buffer 1            // others: same as audio buffer 2 define            __dwW99AVCmdArg[4] = FALSE;            // Set audio buffer 2 address            __dwW99AVCmdArg[5] = W99AV_ADDR_ABUFF2;            // Give the final number of ARG1 ~ ARG15            __dwW99AVCmdArg[0]=5;            W99AV_CommandN (COMMAND_SAVBS);  // set A/V buffer size command        }        break;    case    W99AV_RESET_CDIF : // Reset     CD Interface        __wW99AVPCRLow=__wW99AVPCRLow | 0x0800; // set bit(11)--CDIFRST to 1        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        __wW99AVPCRLow=__wW99AVPCRLow & 0xF7FF; // set bit(11)--CDIFRST to 0        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        break;    case    W99AV_RESET_PARSER :  // Reset Parser        // original        __wW99AVPCRLow=__wW99AVPCRLow | 0x1000; // set bit(12)--PARRST to 1        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        __wW99AVPCRLow=__wW99AVPCRLow & 0xEFFF; // set bit(12)--PARRST to 0        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        break;    case    W99AV_RESET_KC :   // Reset     KC        break;    case    W99AV_RESET_TOTALRST: // Chuan0.91, PCR[8]: Total_rst#if IO == IO_8051        _btW99AV1 = EA ;        EA = 0 ;  // Chuan0.91, Must Disable Interrupt, because internal 12K SRAM is not available when total reset assert for 908 IC.        W99AV_WriteRegDW(PCR, (WORD)(__wW99AVPCRLow|0x0100), __wW99AVPCRHigh);        // Chuan0.91, internal 12K SRAM is not available when total reset assert for 908 IC.        // Set address and space id to AIR        OUTB(AIR3,0x00);        OUTB(AIR2,0x00);        OUTB(AIR1,0x00);        OUTB(AIR0,PCR);        // Write desired into DPR        OUTB(DPR3,HIBYTE(__wW99AVPCRHigh));        OUTB(DPR2,LOBYTE(__wW99AVPCRHigh));        OUTB(DPR1,HIBYTE(__wW99AVPCRLow));        OUTB(DPR0,LOBYTE(__wW99AVPCRLow));        EA = _btW99AV1;#else	   W99AV_WriteRegDW(PCR, (WORD)(__wW99AVPCRLow|0x0100), __wW99AVPCRHigh);       W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);#endif        break;    case    W99AV_RESET_ALL :        break;    case    W99AV_RESET_VIDEO :     // reset video decoder        // record the value     of OSD_TOP_ADDR;        W99AV_ReadDRAMData(W99AV_DRAM_OSDT_ADR, &_dwTemp1 );        W99AV_ReadDRAMData(W99AV_DRAM_OSDT_SIZE, &_dwTemp2);        // temporally disable OSD display        __wW99AVVCRLow &= ~0x00000040;  // disable OSD_EN in VCR        __dwW99AVCmdArg [0] = 2     ;        __dwW99AVCmdArg [1] = CMDARG_SVC2 ;        __dwW99AVCmdArg [2] = MAKELONG (__wW99AVVCRHigh, __wW99AVVCRLow) ;        W99AV_CommandN (COMMAND_SVC2) ;         // Set Video Configuration Register        W99AV_WriteDRAMData( W99AV_DRAM_OSDT_ADR, 0);        W99AV_WriteDRAMData( W99AV_DRAM_OSDB_ADR, 0);        // do video     reset in the period     of VSYNC        W99AV_ClearInterrupt(INT_VSYNC);        wCnt=0;        while ( (W99AV_GetPSR() & INT_VSYNC) == 0 )        {            wCnt++;            if(wCnt>VSYNCLOOP)            {#ifdef  SUPPORT_PRINTF                printf("\nWait no VSYNC !!");#endif                break;            }        }        __wW99AVPCRLow=__wW99AVPCRLow | 0x0050; // set bit(4,6)--VD,VO to 1        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        __wW99AVPCRLow=__wW99AVPCRLow & 0xFFAF; // set bit(4,6)--VD,VO to 0        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        //restore the status of OSD     pointer and     enable OSD display again        W99AV_WriteDRAMData( W99AV_DRAM_OSDT_ADR, _dwTemp1 );        W99AV_WriteDRAMData( W99AV_DRAM_OSDT_SIZE, _dwTemp2 );        W99AV_WriteDRAMData( W99AV_DRAM_OSDB_ADR, _dwTemp1     );        W99AV_WriteDRAMData( W99AV_DRAM_OSDB_SIZE, _dwTemp2 );        __wW99AVVCRLow |= 0x00000040;        __dwW99AVCmdArg [0] = 2     ;        __dwW99AVCmdArg [1] = CMDARG_SVC2 ;        __dwW99AVCmdArg [2] = MAKELONG (__wW99AVVCRHigh, __wW99AVVCRLow) ;        W99AV_CommandN (COMMAND_SVC2) ;         // Set Video Configuration Register        break;    case    W99AV_RESET_VO :        __wW99AVPCRLow=__wW99AVPCRLow | 0x0040; // set bit(6)--ARST     to 1        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        __wW99AVPCRLow=__wW99AVPCRLow & 0xFFBF; // set bit(6)--ARST     to 0        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        break ;    //Kevin1.07f, no ATAPI IF    /*    case    W99AV_RESET_ATAPI :        __wW99AVPCRHigh |= 0x0040;       // set bit(22)--ARST    to 1        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        __wW99AVPCRHigh &= 0xFFBF;       // set bit(22)--ARST    to 0        W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh);        break ;    */    default :        break;    }}// *****************************************************************************//      Function        :       W99AV_ReadInfo//      Description     :       Read information of     specified item//      Arguments       :       bInfo:the desired infomation type ;//                              pdwData:the     value of specified information type//      Return          :       TRUE or FALSE//      Side Effect     :// *****************************************************************************// wyc1.22a, disable the interrupt in this function because of *pdwData is XDATA and it maybe destroy by ISR_ROUTINE// when other module is executing W99AV_ReadInfo function.#pragma DISABLE // called in ISR#pragma NOAREGSBYTE W99AV_ReadInfo(BYTE bInfo, DWORD *pdwData){    // Chuan 276 2002/08/20: directly return value    // BIT     btRet;    switch(bInfo)    {    case    W99AV_INFO_FRAME_ID :        return W99AV_ReadDRAMData(W99AV_DRAM_FRAME_ID, pdwData);        break;    case    W99AV_INFO_DRAM_SHSIZE : //     0x84 in VCD25        // for error picture size detect        return FALSE;        break;    case    W99AV_INFO_DRAM_SVSIZE : //     0x85 in VCD25        // for error picture size detect        return FALSE;        break;    case    W99AV_INFO_FRAME_ERROR :        return W99AV_ReadDRAMData(W99AV_DRAM_DEC_ERR, pdwData ); // Chuan1.05, notify F/W that picture decoding error has occurred        break;    case    W99AV_INFO_MACRO_BLOCK :        _btW99AV1=EA;        EA=0;        if(W99AV_Command1(COMMAND_RMBCNT,CMDARG_RMBCNT))        {            W99AV_OutIndex(0x10000000);            *pdwData=W99AV_InData() & 0xFFFF;            EA=_btW99AV1;            return TRUE;        }        else        {            EA=_btW99AV1;            return FALSE;        }        break;//LJY1.20, support 4M flash, remove digest#ifndef NO_DIGEST    case    W99AV_INFO_DIGEST_HSIZE :        //wyc.099 for DVD and VCD digest clean screen        *pdwData=720;        return TRUE;        break;    case    W99AV_INFO_DIGEST_VSIZE :        *pdwData=576;        return TRUE;        break;    case    W99AV_INFO_DIGEST_YBUFFER :        return FALSE;        break;    case    W99AV_INFO_DIGEST_UBUFFER :        return FALSE;        break;    case    W99AV_INFO_DIGEST_VBUFFER :        return FALSE;        break;    case    W99AV_INFO_DIGEST_LUMINACE :        return W99AV_ReadDRAMData(W99AV_DRAM_DIGEST_Y, pdwData);        break;#endif    case    W99AV_INFO_CHIP_ID :    //DVD_051Micky, read chip version        return W99AV_ReadDRAMData(W99AV_DRAM_VERSION_ADR, pdwData );        break;    case    W99AV_INFO_RISC_VER:        return FALSE;        break;    case    W99AV_INFO_DSP_VER:        return FALSE;        break;    case    W99AV_INFO_IFIFO_REMAIN : // Input-Bitstream-FIFO remainder#if  IO == IO_PCI        // Chuan0.81, Use PCI Delay        // Chuan0.83a, EPP don't need read back twice and delay.#ifndef   IO_EPP        //_Delay(DELAY);        _dwTemp1=_inpdw((WORD)IBFR);  // discard the value of first time reading#endif	// IO_EPP        //_Delay(DELAY);        *pdwData=_inpdw((WORD)IBFR) & 0x7F;  // the valid data#else        _btW99AV1=EA;        EA=0;        *pdwData=((DWORD)INPB(IBFR)) & 0x7F;        EA=_btW99AV1;#endif        return TRUE;        break;    case    W99AV_INFO_AFIFO_REMAIN : // Input Audio bitstream FIFO remainder#if  IO == IO_PCI        // Chuan0.81, Use PCI Delay        // Chuan0.83a, EPP don't need read back twice and delay.#ifndef   IO_EPP        //_Delay(DELAY);        _dwTemp1=_inpdw((WORD)IAFR);  // discard the value of first time reading#endif	// IO_EPP        //_Delay(DELAY);        *pdwData=_inpdw((WORD)IAFR) & 0x3F;#else        _btW99AV1=EA;        EA=0;        *pdwData=((DWORD)INPB(IAFR)) & 0x3F;        EA=_btW99AV1;#endif        return TRUE;        break;    case    W99AV_INFO_VIDEO_REMAIN : // remainder of video bitstream buffer in DRAM        // TCC019        // since video remainder returns WORD. We always return the DWORD value        // Chuan1.10, Don't need divide by 2 from 20031106 RISC code.        // *pdwData = (W99AV_ReadRegDW (VBRR) >> 1) ;