<AVRWorkspace><IOSettings><CurrentRegisters><TWI><register register="TWBR" group="TWI" display="1" locked="0"/></TWI><TWI><register register="TWSR" group="TWI" display="1" locked="0"/></TWI><TWI><register register="TWAR" group="TWI" display="1" locked="0"/></TWI><TWI><register register="TWDR" group="TWI" display="1" locked="0"/></TWI><AD_CONVERTER><register register="ADC" group="AD_CONVERTER" display="1" locked="0"/></AD_CONVERTER><AD_CONVERTER><register register="ADCSRA" group="AD_CONVERTER" display="1" locked="0"/></AD_CONVERTER><AD_CONVERTER><register register="ADMUX" group="AD_CONVERTER" display="1" locked="0"/></AD_CONVERTER><ANALOG_COMPARATOR><register register="ACSR" group="ANALOG_COMPARATOR" display="1" locked="0"/></ANALOG_COMPARATOR><USART><register register="UBRRL" group="USART" display="1" locked="0"/></USART><USART><register register="UCSRB" group="USART" display="1" locked="0"/></USART><USART><register register="UCSRA" group="USART" display="1" locked="0"/></USART><USART><register register="UDR" group="USART" display="1" locked="0"/></USART><SPI><register register="SPCR" group="SPI" display="1" locked="0"/></SPI><SPI><register register="SPSR" group="SPI" display="1" locked="0"/></SPI><SPI><register register="SPDR" group="SPI" display="1" locked="0"/></SPI><PORTD><register register="PIND" group="PORTD" display="1" locked="0"/></PORTD><PORTD><register register="DDRD" group="PORTD" display="1" locked="0"/></PORTD><PORTD><register register="PORTD" group="PORTD" display="1" locked="0"/></PORTD><PORTC><register register="PINC" group="PORTC" display="1" locked="0"/></PORTC><PORTC><register register="DDRC" group="PORTC" display="1" locked="0"/></PORTC><PORTC><register register="PORTC" group="PORTC" display="1" locked="0"/></PORTC><PORTB><register register="PINB" group="PORTB" display="1" locked="0"/></PORTB><PORTB><register register="DDRB" group="PORTB" display="1" locked="0"/></PORTB><PORTB><register register="PORTB" group="PORTB" display="1" locked="0"/></PORTB><PORTA><register register="PINA" group="PORTA" display="1" locked="0"/></PORTA><PORTA><register register="DDRA" group="PORTA" display="1" locked="0"/></PORTA><PORTA><register register="PORTA" group="PORTA" display="1" locked="0"/></PORTA><EEPROM><register register="EECR" group="EEPROM" display="1" locked="0"/></EEPROM><EEPROM><register register="EEDR" group="EEPROM" display="1" locked="0"/></EEPROM><EEPROM><register register="EEAR" group="EEPROM" display="1" locked="0"/></EEPROM><USART><register register="UBRRH" group="USART" display="1" locked="0"/></USART><USART><register register="UCSRC" group="USART" display="1" locked="0"/></USART><WATCHDOG><register register="WDTCR" group="WATCHDOG" display="1" locked="0"/></WATCHDOG><TIMER_COUNTER_2><register register="ASSR" group="TIMER_COUNTER_2" display="1" locked="0"/></TIMER_COUNTER_2><TIMER_COUNTER_2><register register="OCR2" group="TIMER_COUNTER_2" display="1" locked="0"/></TIMER_COUNTER_2><TIMER_COUNTER_2><register register="TCNT2" group="TIMER_COUNTER_2" display="1" locked="0"/></TIMER_COUNTER_2><TIMER_COUNTER_2><register register="TCCR2" group="TIMER_COUNTER_2" display="1" locked="0"/></TIMER_COUNTER_2><TIMER_COUNTER_1><register register="ICR1" group="TIMER_COUNTER_1" display="1" locked="0"/></TIMER_COUNTER_1><TIMER_COUNTER_1><register register="OCR1B" group="TIMER_COUNTER_1" display="1" locked="0"/></TIMER_COUNTER_1><TIMER_COUNTER_1><register register="OCR1A" group="TIMER_COUNTER_1" display="1" locked="0"/></TIMER_COUNTER_1><TIMER_COUNTER_1><register register="TCNT1" group="TIMER_COUNTER_1" display="1" locked="0"/></TIMER_COUNTER_1><TIMER_COUNTER_1><register register="TCCR1B" group="TIMER_COUNTER_1" display="1" locked="0"/></TIMER_COUNTER_1><TIMER_COUNTER_1><register register="TCCR1A" group="TIMER_COUNTER_1" display="1" locked="0"/></TIMER_COUNTER_1><AD_CONVERTER><register register="SFIOR" group="AD_CONVERTER" display="1" locked="0"/></AD_CONVERTER><ANALOG_COMPARATOR><register register="SFIOR" group="ANALOG_COMPARATOR" display="1" locked="0"/></ANALOG_COMPARATOR><CPU><register register="SFIOR" group="CPU" display="1" locked="0"/></CPU><TIMER_COUNTER_0><register register="SFIOR" group="TIMER_COUNTER_0" display="1" locked="0"/></TIMER_COUNTER_0><TIMER_COUNTER_2><register register="SFIOR" group="TIMER_COUNTER_2" display="1" locked="0"/></TIMER_COUNTER_2><CPU><register register="OSCCAL" group="CPU" display="1" locked="0"/></CPU><JTAG><register register="OCDR" group="JTAG" display="1" locked="0"/></JTAG><TIMER_COUNTER_0><register register="TCNT0" group="TIMER_COUNTER_0" display="1" locked="0"/></TIMER_COUNTER_0><TIMER_COUNTER_0><register register="TCCR0" group="TIMER_COUNTER_0" display="1" locked="0"/></TIMER_COUNTER_0><CPU><register register="MCUCSR" group="CPU" display="1" locked="0"/></CPU><EXTERNAL_INTERRUPT><register register="MCUCSR" group="EXTERNAL_INTERRUPT" display="1" locked="0"/></EXTERNAL_INTERRUPT><JTAG><register register="MCUCSR" group="JTAG" display="1" locked="0"/></JTAG><CPU><register register="MCUCR" group="CPU" display="1" locked="0"/></CPU><EXTERNAL_INTERRUPT><register register="MCUCR" group="EXTERNAL_INTERRUPT" display="1" locked="0"/></EXTERNAL_INTERRUPT><TWI><register register="TWCR" group="TWI" display="1" locked="0"/></TWI><BOOT_LOAD><register register="SPMCSR" group="BOOT_LOAD" display="1" locked="0"/></BOOT_LOAD><TIMER_COUNTER_0><register register="TIFR" group="TIMER_COUNTER_0" display="1" locked="0"/></TIMER_COUNTER_0><TIMER_COUNTER_1><register register="TIFR" group="TIMER_COUNTER_1" display="1" locked="0"/></TIMER_COUNTER_1><TIMER_COUNTER_2><register register="TIFR" group="TIMER_COUNTER_2" display="1" locked="0"/></TIMER_COUNTER_2><TIMER_COUNTER_0><register register="TIMSK" group="TIMER_COUNTER_0" display="1" locked="0"/></TIMER_COUNTER_0><TIMER_COUNTER_1><register register="TIMSK" group="TIMER_COUNTER_1" display="1" locked="0"/></TIMER_COUNTER_1><TIMER_COUNTER_2><register register="TIMSK" group="TIMER_COUNTER_2" display="1" locked="0"/></TIMER_COUNTER_2><EXTERNAL_INTERRUPT><register register="GIFR" group="EXTERNAL_INTERRUPT" display="1" locked="0"/></EXTERNAL_INTERRUPT><EXTERNAL_INTERRUPT><register register="GICR" group="EXTERNAL_INTERRUPT" display="1" locked="0"/></EXTERNAL_INTERRUPT><TIMER_COUNTER_0><register register="OCR0" group="TIMER_COUNTER_0" display="1" locked="0"/></TIMER_COUNTER_0><CPU><register register="SP" group="CPU" display="1" locked="0"/></CPU><CPU><register register="SREG" group="CPU" display="1" locked="0"/></CPU></CurrentRegisters></IOSettings><part name="ATMEGA16"/><Files><File00000 Name="F:\danpianji\The code\AVR Devolpment Board\uart\uart_tx_rx_isr\app.c" Position="789 75 1320 519" LineCol="25 1" State="Maximized"/></Files></AVRWorkspace>