ARCHITECTURE(ADSP-TS201)

#ifndef __NO_STD_LIB
SEARCH_DIR( $ADI_DSP/TS/lib )
#endif


$OBJECTS = $COMMAND_LINE_OBJECTS;

// Internal memory blocks are 0x20000 (128k)

MEMORY
{
    M0Code      { TYPE(RAM) START(0x00000000) END(0x0001FF9F) WIDTH(32) }
    M2DataA     { TYPE(RAM) START(0x00040000) END(0x0004FFFF) WIDTH(32) }
    M2DataB     { TYPE(RAM) START(0x00050000) END(0x0005FFFF) WIDTH(32) }
    M4DataA     { TYPE(RAM) START(0x00080000) END(0x0008FFFF) WIDTH(32) }
    M4DataB     { TYPE(RAM) START(0x00090000) END(0x0009FFFF) WIDTH(32) }
    M6DataA     { TYPE(RAM) START(0x000C0000) END(0x000CFFFF) WIDTH(32) }
    M6DataB     { TYPE(RAM) START(0x000D0000) END(0x000DFFFF) WIDTH(32) }
    M8DataA     { TYPE(RAM) START(0x00100000) END(0x0010FFFF) WIDTH(32) }
    
    
    M8DataB     { TYPE(RAM) START(0x00110000) END(0x0011FDFF) WIDTH(32) }
    
    MStack_J		{TYPE( RAM) START(0x0011fe00) END(0x0011ffff) WIDTH(32)  }
    
    MInterface     { TYPE( RAM) START(0x00140000) END(0x001403ff) WIDTH(32)   }
    
    M10DataA     { TYPE(RAM) START(0x00140400) END(0x0014FFFF) WIDTH(32) }
    M10DataB     { TYPE(RAM) START(0x00150000) END(0x0015FDFF) WIDTH(32) }
 
    
    MStack_K     { TYPE( RAM) START(0x0015fe00) END(0x0015ffff) WIDTH(32)   }
    
    MS0         { TYPE(RAM) START(0x30000000) END(0x37FFFFFF) WIDTH(32) }
    MS1         { TYPE(RAM) START(0x38000000) END(0x3FFFFFFF) WIDTH(32) }
    MSSD0       { TYPE(RAM) START(0x40000000) END(0x43FFFFFF) WIDTH(32) }
    MSSD1       { TYPE(RAM) START(0x50000000) END(0x53FFFFFF) WIDTH(32) }
    MSSD2       { TYPE(RAM) START(0x60000000) END(0x63FFFFFF) WIDTH(32) }
    MSSD3       { TYPE(RAM) START(0x70000000) END(0x73FFFFFF) WIDTH(32) }

// Memory blocks need to be less than 2 Gig.
     HOST        { TYPE(RAM) START(0x80000000) END(0x8FFFFFFF) WIDTH(32) }
    HOST1       { TYPE(RAM) START(0x90000000) END(0xAFFFFFFF) WIDTH(32) }
    HOST2       { TYPE(RAM) START(0xB0000000) END(0xCFFFFFFF) WIDTH(32) }
    HOST3       { TYPE(RAM) START(0xD0000000) END(0xEFFFFFFF) WIDTH(32) }
    HOST4       { TYPE(RAM) START(0xF0000000) END(0xFFFFFFFF) WIDTH(32) }
}

PROCESSOR P0
{
    OUTPUT( $COMMAND_LINE_OUTPUT_FILE )

    SECTIONS
    {
        code
        {
            FILL(0xb3c00000)
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( SS_SYN.doj(program)       system_func.doj(program)  $OBJECTS(program) memory_allocation.doj(program)   )
            // The next line adds 10 nops to the end of the code section.
            // This is required on TS201 to prevent uninitialised memory
            // getting into the pipeline.
            . = . + 10;
        } >M0Code

        data1
        {
            INPUT_SECTIONS( $OBJECTS(data1) )
        } >M4DataA

        bsz_init
        {
            INPUT_SECTIONS( $OBJECTS(bsz_init) )
        } >M4DataA
    
        .meminit {} >M4DataA
    
        bsz ZERO_INIT
        {
            INPUT_SECTIONS( $OBJECTS(bsz) )
        } >M4DataA

        MEM_ARGV
        {
            INPUT_SECTIONS( $OBJECTS(MEM_ARGV) )
        } >M4DataA


        data2
        {
            INPUT_SECTIONS( $OBJECTS(data2) )
        } >M8DataA



        data2a
        {
            INPUT_SECTIONS( $OBJECTS(data2a) )
        } >M2DataA

        data2b
        {
            INPUT_SECTIONS( $OBJECTS(data2b) )
        } >M2DataB

        data4a
        {
            INPUT_SECTIONS( $OBJECTS(data4a) )
        } >M4DataA

        data4b
        {
            INPUT_SECTIONS( $OBJECTS(data4b) )
        } >M4DataB

        data6a
        {
            INPUT_SECTIONS( $OBJECTS(data6a) )
        } >M6DataA

        data6b
        {
            INPUT_SECTIONS( $OBJECTS(data6b) )
        } >M6DataB

        data8a
        {
            INPUT_SECTIONS( $OBJECTS(data8a) )
        } >M8DataA

        data8b
        {
            INPUT_SECTIONS( $OBJECTS(data8b))
        } >M8DataB

        data10a
        {
            INPUT_SECTIONS( $OBJECTS(data10a))
        } >M10DataA

        data10b
        {
            INPUT_SECTIONS( $OBJECTS(data10b))
        } >M10DataB
        	 Interface
        {
            INPUT_SECTIONS( $OBJECTS(Interface))
        } >MInterface
        
        Stack_J
        {
            INPUT_SECTIONS( $OBJECTS(Stack_J))
        } >MStack_J
        
        Stack_K
        {
            INPUT_SECTIONS( $OBJECTS(Stack_K))
        } >MStack_K

    }
}