?? f020config.lst
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C51 COMPILER V7.50 F020CONFIG 09/08/2007 13:14:13 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE F020CONFIG
OBJECT MODULE PLACED IN F020CONFIG.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE F020CONFIG.C BROWSE DEBUG OBJECTEXTEND
line level source
1 #include <C8051F020.h> // Register definition file.
2 void config (void)
3 {
4 1
5 1 int i = 0;
6 1
7 1 /****************交義開關(guān)配置**********************************/
8 1 //XBR0
9 1 //Bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
10 1 //CP0E ECI0E PCA0ME UART0EN SPI0EN SMB0EN
11 1 XBR0 = 0x07; // UART0EN SPI0EN SMB0EN
12 1
13 1 //XBR1
14 1 //Bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
15 1 //SYSCKE T2EXE T2E INT1E T1E INT0E T0E CP1E
16 1 XBR1 = 0x00; // XBAR1: Initial Reset Value
17 1
18 1 //XBR2
19 1 //Bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
20 1 //WEAKPUD XRARE - T4EXE T4E UART1E EMIFLE CNVST0E
21 1 XBR2 = 0x40; // XRARE=1 交義開關(guān)允許
22 1 /*****************************************************************/
23 1
24 1
25 1
26 1 /***************端口輸入輸出方式配置****************************/
27 1 P0MDOUT = 0x1c; //SDA SCL RXD0 RXD1必需為漏極開路輸出
28 1 P1MDIN = 0x00; //ADC1口，所以配置為模擬輸入
29 1 P1MDOUT = 0x00;
30 1 P2MDOUT = 0x00;
31 1 P3MDOUT = 0xFF;//P3.0為推挽輸出
32 1 P74OUT = 0xFF;//高端口為推挽方式
33 1 /***************************************************************/
34 1
35 1
36 1
37 1
38 1 /**************外部存儲器配置**********************************/
39 1 EMI0CF=0x3f; //外部存儲器接口配置
40 1 EMI0TC=0xff; //外部存儲器時序控制 //一次XRAM操作要22個sysclk
41 1 /***************************************************************/
42 1
43 1
44 1
45 1 /*************比較器配置***************************************/
46 1 CPT0CN = 0x00; // Comparator 0 Control Register
47 1 CPT1CN = 0x00; // Comparator 1 Control Register
48 1 /***************************************************************/
49 1
50 1
51 1
52 1
53 1 /******************振蕩器配置***************************************/
54 1 OSCXCN = 0x67; // start external oscillator with 22.1184MHz crystal
55 1 for (i=0; i < 256; i++) ; // Wait for osc. to start up
C51 COMPILER V7.50 F020CONFIG 09/08/2007 13:14:13 PAGE 2
56 1 while (!(OSCXCN & 0x80)) ; // Wait for crystal osc. to settle
57 1 OSCICN = 0x08; // Disable the internal osc.
58 1 /***************************************************************/
59 1
60 1
61 1 /******************電壓基準配置**********************************/
62 1 REF0CN = 0x03; // Reference Control Register
63 1 /***************************************************************/
64 1
65 1
66 1
67 1 /*******************ADC0配置*************************************/
68 1 AMX0CF = 0x00; // AMUX0 Configuration Register
69 1 AMX0SL = 0x00; // AMUX0 Channel Select Register
70 1 ADC0CF = 0x48; //ADC0 Configuration Register增益=1
71 1 ADC0CN = 0xC1; //ADC0使能,寄存器數(shù)據(jù)左對齊
72 1 //ADC0CN = 0x80; //ADC0使能,寄存器數(shù)據(jù)右對齊
73 1 ADC0L = 0x00; // ADC0 Data Word LSB
74 1 ADC0H = 0x00; // ADC0 Data Word MSB
75 1 //ADC0LTH = 0x00; // ADC0 Less-Than High Byte Register
76 1 //ADC0LTL = 0x00; // ADC0 Less-Than Low Byte Register
77 1 //ADC0GTH = 0xFF; // ADC0 Greater-Than High Byte Register
78 1 //ADC0GTL = 0xFF; // ADC0 Greater-Than Low Byte Register
79 1 /***************************************************************/
80 1
81 1
82 1 /*******************ADC1配置*************************************/
83 1 ADC1CF = 0x41; // ADC2 Configuration Register增益=1
84 1 AMX1SL = 0x00; // AMUX1 Chanel Select Register
85 1 ADC1CN = 0xc0; // ADC2 Control Register ADC2使能
86 1 ADC1 = 0x00; //ADC1 Data Word
87 1 /***************************************************************/
88 1
89 1
90 1
91 1 /*******************DA配置*************************************/
92 1 DAC0CN = 0x80; // 打開DAC0，右對齊模式
93 1 DAC0L = 0xFF; // DAC0 Low Byte Register
94 1 DAC0H = 0x0F; // DAC0 High Byte Register
95 1
96 1 DAC1CN = 0x80; // DAC1 Control Register
97 1 DAC1L = 0xff; // DAC1 Low Byte Register
98 1 DAC1H = 0x08; // DAC1 High Byte Register
99 1 /***************************************************************/
100 1
101 1
102 1 /*******************SPI配置*************************************/
103 1 SPI0CFG = 0xc7; // SCK周期的第2個邊沿采數(shù)，SCK空閑為高電平，8位數(shù)據(jù)
104 1 SPI0CN = 0x03; //允許主方式，SPIO。BIT1=MSTEN，BIT0=SPIEN
105 1 SPI0CKR = 0x00; //Fsck=22118400/2(0+1)=22.1184Mhz
106 1 /***************************************************************/
107 1
108 1
109 1
110 1
111 1 /*******************SMBUS配置*************************************/
112 1 SMB0CN = 0x44; // SMBus Control Register //ENSMB=1,使能SMB AA=1，在應(yīng)答周期內(nèi)返回ACK。
113 1 SMB0ADR = 0x00; // SMBus Address Register
114 1 SMB0CR = 0xe0; // SMBus Clock Rate Register ////SCL速率設(shè)置 TLOW=1.44us
115 1 /***************************************************************/
116 1
117 1
C51 COMPILER V7.50 F020CONFIG 09/08/2007 13:14:13 PAGE 3
118 1 /*******************UART0配置*************************************/
119 1 SADEN0 = 0x00; // Serial 0 Slave Address Enable
120 1 SADDR0 = 0x00; // Serial 0 Slave Address Register
121 1 SCON0 = 0x50; // Serial Port Control Register
122 1 PCON = 0x00; // Power Control Register
123 1 /***************************************************************/
124 1
125 1
126 1 /*******************UART1配置*************************************/
127 1 SCON1 = 0x00; // Serial Port 1 Control Register
128 1 /***************************************************************/
129 1
130 1
131 1 /*******************PCA配置*************************************/
132 1 PCA0MD = 0x00; // PCA Mode Register
133 1 PCA0CN = 0x00; // PCA Control Register
134 1 PCA0L = 0x00; // PCA Counter/Timer Low Byte
135 1 PCA0H = 0x00; // PCA Counter/Timer High Byte
136 1
137 1
138 1 //Module 0
139 1 PCA0CPM0 = 0x00; // PCA Capture/Compare Register 0
140 1 PCA0CPL0 = 0x00; // PCA Counter/Timer Low Byte
141 1 PCA0CPH0 = 0x00; // PCA Counter/Timer High Byte
142 1
143 1 //Module 1
144 1 PCA0CPM1 = 0x00; // PCA Capture/Compare Register 1
145 1 PCA0CPL1 = 0x00; // PCA Counter/Timer Low Byte
146 1 PCA0CPH1 = 0x00; // PCA Counter/Timer High Byte
147 1
148 1 //Module 2
149 1 PCA0CPM2 = 0x00; // PCA Capture/Compare Register 2
150 1 PCA0CPL2 = 0x00; // PCA Counter/Timer Low Byte
151 1 PCA0CPH2 = 0x00; // PCA Counter/Timer High Byte
152 1
153 1 //Module 3
154 1 PCA0CPM3 = 0x00; // PCA Capture/Compare Register 3
155 1 PCA0CPL3 = 0x00; // PCA Counter/Timer Low Byte
156 1 PCA0CPH3 = 0x00; // PCA Counter/Timer High Byte
157 1
158 1 //Module 4
159 1 PCA0CPM4 = 0x00; // PCA Capture/Compare Register 4
160 1 PCA0CPL4 = 0x00; // PCA Counter/Timer Low Byte
161 1 PCA0CPH4 = 0x00; // PCA Counter/Timer High Byte
162 1
163 1
164 1 /***************************************************************/
165 1
166 1
167 1
168 1 /*******************定時器配置*************************************/
169 1 CKCON = 0x00; // Clock Control Register sysclk/12
170 1 TH0 = 0x88; //0.065MS a3
171 1 TL0 = 0x88; // Timer 0 Low Byte 8次中斷完成一次全通道AD采樣，即一次AD時間為0.4MS F=2.5K
172 1 //TH0 = 0x82; // Timer 0 High Byte
173 1 TH1 = 0xFF; // Timer 1 High Byte
174 1 TL1 = 0xFF; // Timer 1 Low Byte
175 1 TMOD = 0x22; // Timer Mode Register
176 1 //TCON = 0x50; // Timer Control Register TR0=1；TR1=1;
177 1 TCON = 0x40; // Timer Control Register TR0=0；TR1=1;
178 1
179 1 T2CON = 0x00; // Timer 2 Configuration
C51 COMPILER V7.50 F020CONFIG 09/08/2007 13:14:13 PAGE 4
180 1 RCAP2L = 0x00; // Timer 2 Reload Register Low Byte
181 1 RCAP2H = 0x00; // Timer 2 Reload Register High Byte
182 1 TL2 =0x00;
183 1 TH2 =0x00;
184 1
185 1 TMR3CN = 0x00; // Timer 3 Control Register
186 1 TMR3H = 0x00; // Timer 3 High Byte
187 1 TMR3L = 0x00; // Timer 3 Low Byte
188 1 TMR3RLH=0x00;
189 1
190 1 T4CON =0x00;
191 1 RCAP4L = 0x00; // Timer 4 Reload Register Low Byte
192 1 RCAP4H = 0x00; // Timer 4 Reload Register High Byte
193 1 TL4 =0x00;
194 1 TH4 =0x00;
195 1 /***************************************************************/
196 1
197 1 /*******************復(fù)位配置*************************************/
198 1 RSTSRC = 0x00; // Reset Source Register
199 1 /***************************************************************/
200 1
201 1
202 1 /*******************中斷配置*************************************/
203 1 IE = 0x12; //Interrupt Enable EA=0 ， ET0=1； ES0=1;
204 1 IP = 0x00; //Interrupt Priority
205 1 EIE1 = 0x00;
206 1 EIE2 = 0x00; //Extended Interrupt Enable 2
207 1 EIP1 = 0x00; //Extended Interrupt Priority 1
208 1 EIP2 = 0x00; //Extended Interrupt Priority 2
209 1 /***************************************************************/
210 1
211 1
212 1 } //End of config
213
214
215
216
217
218
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 235 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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