!_TAG_FILE_FORMAT	2	/extended format; --format=1 will not append ;" to lines/!_TAG_FILE_SORTED	1	/0=unsorted, 1=sorted, 2=foldcase/!_TAG_PROGRAM_AUTHOR	Darren Hiebert	/dhiebert@users.sourceforge.net/!_TAG_PROGRAM_NAME	Exuberant Ctags	//!_TAG_PROGRAM_URL	http://ctags.sourceforge.net	/official site/!_TAG_PROGRAM_VERSION	5.4	//ACT_DATA_PH	mx1hw.h	897;"	dADDR_DATA_PH	mx1hw.h	896;"	dADS_RS_set_level	im8803.c	/^void ADS_RS_set_level(U32 level)$/;"	fADS_sensor_reset	im8803.c	/^void ADS_sensor_reset(void)$/;"	fADS_standby_disable	im8803.c	/^void ADS_standby_disable(void)$/;"	fADS_standby_enable	im8803.c	/^void ADS_standby_enable(void)$/;"	fAIPI1_BASE_ADDR	mx1hw.h	195;"	dAIPI1_PAR	mx1hw.h	198;"	dAIPI1_PSR0	mx1hw.h	196;"	dAIPI1_PSR1	mx1hw.h	197;"	dAIPI2_BASE_ADDR	mx1hw.h	204;"	dAIPI2_PAR	mx1hw.h	207;"	dAIPI2_PSR0	mx1hw.h	205;"	dAIPI2_PSR1	mx1hw.h	206;"	dAITC_BASE_ADDR	mx1hw.h	230;"	dAITC_FIPNDH	mx1hw.h	255;"	dAITC_FIPNDL	mx1hw.h	256;"	dAITC_FIVECSR	mx1hw.h	248;"	dAITC_INTCNTL	mx1hw.h	231;"	dAITC_INTDISNUM	mx1hw.h	234;"	dAITC_INTENABLEH	mx1hw.h	235;"	dAITC_INTENABLEL	mx1hw.h	236;"	dAITC_INTENNUM	mx1hw.h	233;"	dAITC_INTFRCH	mx1hw.h	251;"	dAITC_INTFRCL	mx1hw.h	252;"	dAITC_INTSRCH	mx1hw.h	249;"	dAITC_INTSRCL	mx1hw.h	250;"	dAITC_INTTYPEH	mx1hw.h	237;"	dAITC_INTTYPEL	mx1hw.h	238;"	dAITC_NIMASK	mx1hw.h	232;"	dAITC_NIPNDH	mx1hw.h	253;"	dAITC_NIPNDL	mx1hw.h	254;"	dAITC_NIPRIORITY0	mx1hw.h	246;"	dAITC_NIPRIORITY1	mx1hw.h	245;"	dAITC_NIPRIORITY2	mx1hw.h	244;"	dAITC_NIPRIORITY3	mx1hw.h	243;"	dAITC_NIPRIORITY4	mx1hw.h	242;"	dAITC_NIPRIORITY5	mx1hw.h	241;"	dAITC_NIPRIORITY6	mx1hw.h	240;"	dAITC_NIPRIORITY7	mx1hw.h	239;"	dAITC_NIVECSR	mx1hw.h	247;"	dAREA	khead.h	/^} AREA, *P_AREA;$/;"	tASP_ACNTLCR	mx1hw.h	296;"	dASP_BASE_ADDR	mx1hw.h	291;"	dASP_CLKDIV	mx1hw.h	303;"	dASP_CMPCNTL	mx1hw.h	304;"	dASP_ICNTLR	mx1hw.h	298;"	dASP_ISTATR	mx1hw.h	299;"	dASP_PADFIFO	mx1hw.h	292;"	dASP_PSMPLRG	mx1hw.h	297;"	dASP_PTRREG	mx1hw.h	305;"	dASP_VADCOEF	mx1hw.h	295;"	dASP_VADFIFO	mx1hw.h	293;"	dASP_VADGAIN	mx1hw.h	300;"	dASP_VDACOEF	mx1hw.h	302;"	dASP_VDAFIFO	mx1hw.h	294;"	dASP_VDAGAIN	mx1hw.h	301;"	dBOOL	khead.h	/^typedef U8 BOOL;		\/* Boolean, TRUE\/FALSE *\/$/;"	tBOOLEAN	khead.h	/^typedef signed char BOOLEAN;$/;"	tBOOTROM_ADDR_BOT	mx1hw.h	310;"	dBOOTROM_ASS_SIZE	mx1hw.h	312;"	dBOOTROM_PHY_SIZE	mx1hw.h	311;"	dBTA_BASE_ADDR	mx1hw.h	319;"	dBTA_BUF_WORD_0	mx1hw.h	368;"	dBTA_BUF_WORD_1	mx1hw.h	369;"	dBTA_BUF_WORD_10	mx1hw.h	378;"	dBTA_BUF_WORD_11	mx1hw.h	379;"	dBTA_BUF_WORD_12	mx1hw.h	380;"	dBTA_BUF_WORD_13	mx1hw.h	381;"	dBTA_BUF_WORD_14	mx1hw.h	382;"	dBTA_BUF_WORD_15	mx1hw.h	383;"	dBTA_BUF_WORD_16	mx1hw.h	384;"	dBTA_BUF_WORD_17	mx1hw.h	385;"	dBTA_BUF_WORD_18	mx1hw.h	386;"	dBTA_BUF_WORD_19	mx1hw.h	387;"	dBTA_BUF_WORD_2	mx1hw.h	370;"	dBTA_BUF_WORD_20	mx1hw.h	388;"	dBTA_BUF_WORD_21	mx1hw.h	389;"	dBTA_BUF_WORD_22	mx1hw.h	390;"	dBTA_BUF_WORD_23	mx1hw.h	391;"	dBTA_BUF_WORD_24	mx1hw.h	392;"	dBTA_BUF_WORD_25	mx1hw.h	393;"	dBTA_BUF_WORD_26	mx1hw.h	394;"	dBTA_BUF_WORD_27	mx1hw.h	395;"	dBTA_BUF_WORD_28	mx1hw.h	396;"	dBTA_BUF_WORD_29	mx1hw.h	397;"	dBTA_BUF_WORD_3	mx1hw.h	371;"	dBTA_BUF_WORD_30	mx1hw.h	398;"	dBTA_BUF_WORD_31	mx1hw.h	399;"	dBTA_BUF_WORD_4	mx1hw.h	372;"	dBTA_BUF_WORD_5	mx1hw.h	373;"	dBTA_BUF_WORD_6	mx1hw.h	374;"	dBTA_BUF_WORD_7	mx1hw.h	375;"	dBTA_BUF_WORD_8	mx1hw.h	376;"	dBTA_BUF_WORD_9	mx1hw.h	377;"	dBTA_BYTE_REV	mx1hw.h	354;"	dBTA_CLK_CTRL	mx1hw.h	413;"	dBTA_COMMAND	mx1hw.h	320;"	dBTA_CORR_MAX	mx1hw.h	361;"	dBTA_CORR_TIME	mx1hw.h	342;"	dBTA_ENCRYPT	mx1hw.h	339;"	dBTA_ESTCLK_H	mx1hw.h	332;"	dBTA_ESTCLK_L	mx1hw.h	331;"	dBTA_ESTCNT	mx1hw.h	327;"	dBTA_FREQ_OUT	mx1hw.h	427;"	dBTA_HECCRC	mx1hw.h	337;"	dBTA_HOPWORDS_0	mx1hw.h	426;"	dBTA_HOPWORDS_1	mx1hw.h	428;"	dBTA_HOPWORDS_2	mx1hw.h	429;"	dBTA_HOPWORDS_3	mx1hw.h	430;"	dBTA_HOPWORDS_4	mx1hw.h	431;"	dBTA_INTERRUPT	mx1hw.h	434;"	dBTA_NATIVECLK_H	mx1hw.h	330;"	dBTA_NATIVECLK_L	mx1hw.h	329;"	dBTA_NATIVECNT	mx1hw.h	326;"	dBTA_OFFSETCLK_H	mx1hw.h	334;"	dBTA_OFFSETCLK_L	mx1hw.h	333;"	dBTA_OFFSETCNT	mx1hw.h	328;"	dBTA_PACKETHEAD	mx1hw.h	322;"	dBTA_PAYLOADHEAD	mx1hw.h	323;"	dBTA_PWM_TX	mx1hw.h	347;"	dBTA_RF_CTRL	mx1hw.h	348;"	dBTA_RF_GPO	mx1hw.h	343;"	dBTA_RF_STATUS	mx1hw.h	349;"	dBTA_RSSI	mx1hw.h	344;"	dBTA_RX_TIME	mx1hw.h	350;"	dBTA_SPI_CTRL	mx1hw.h	422;"	dBTA_SPI_RADDR	mx1hw.h	421;"	dBTA_SPI_STATUS	mx1hw.h	423;"	dBTA_SPI_WADDR	mx1hw.h	420;"	dBTA_SPI_WORD_0	mx1hw.h	416;"	dBTA_SPI_WORD_1	mx1hw.h	417;"	dBTA_SPI_WORD_2	mx1hw.h	418;"	dBTA_SPI_WORD_3	mx1hw.h	419;"	dBTA_STATUS	mx1hw.h	321;"	dBTA_SYNCHWORD_0	mx1hw.h	362;"	dBTA_SYNCHWORD_1	mx1hw.h	363;"	dBTA_SYNCHWORD_2	mx1hw.h	364;"	dBTA_SYNCHWORD_3	mx1hw.h	365;"	dBTA_SYNC_FC	mx1hw.h	438;"	dBTA_SYNC_METRIC	mx1hw.h	437;"	dBTA_THRESHOLD	mx1hw.h	360;"	dBTA_TIMER	mx1hw.h	357;"	dBTA_TIME_AB	mx1hw.h	345;"	dBTA_TIME_CD	mx1hw.h	346;"	dBTA_TX_TIME	mx1hw.h	351;"	dBTA_WHITE	mx1hw.h	338;"	dBTA_WORD_REV	mx1hw.h	353;"	dBTA_WU_1	mx1hw.h	402;"	dBTA_WU_2	mx1hw.h	403;"	dBTA_WU_3	mx1hw.h	404;"	dBTA_WU_4	mx1hw.h	406;"	dBTA_WU_COUNT	mx1hw.h	410;"	dBTA_WU_CTRL	mx1hw.h	408;"	dBTA_WU_DELTA3	mx1hw.h	405;"	dBTA_WU_DELTA4	mx1hw.h	407;"	dBTA_WU_STATUS	mx1hw.h	409;"	dCC	Makefile	/^CC = arm-elf-linux-gcc$/;"	mCFLAG	mx1hw.h	179;"	dCFLAGS	Makefile	/^CFLAGS = -O0 -Wall -Wsign-compare -DCONFIG_KERNELD -DMODULE -D__KERNEL__ -DLinux -nostdinc -I. -I..\/..\/linux-2.4.18-rmk4\/include -idirafter \/usr\/local\/lib\/gcc-lib\/arm-elf-linux\/2.95.3\/include$/;"	mCODE_DATA_PH	mx1hw.h	895;"	dCR	mx1hw.h	1022;"	dCRM_BASE_ADDR	mx1hw.h	444;"	dCRM_CSCR	mx1hw.h	445;"	dCRM_FMCR	mx1hw.h	454;"	dCRM_GPCR	mx1hw.h	455;"	dCRM_MPCTL0	mx1hw.h	446;"	dCRM_MPCTL1	mx1hw.h	447;"	dCRM_PCDR	mx1hw.h	450;"	dCRM_RSR	mx1hw.h	452;"	dCRM_SIDR	mx1hw.h	453;"	dCRM_UPCTL0	mx1hw.h	448;"	dCRM_UPCTL1	mx1hw.h	449;"	dCS0_BASE_ADDR	mx1hw.h	1223;"	dCS0_END_ADDR	mx1hw.h	1224;"	dCS1_BASE_ADDR	mx1hw.h	1225;"	dCS1_END_ADDR	mx1hw.h	1226;"	dCS2_BASE_ADDR	mx1hw.h	1227;"	dCS2_END_ADDR	mx1hw.h	1228;"	dCS3_BASE_ADDR	mx1hw.h	1229;"	dCS3_END_ADDR	mx1hw.h	1230;"	dCS4_BASE_ADDR	mx1hw.h	1231;"	dCS4_END_ADDR	mx1hw.h	1232;"	dCS5_BASE_ADDR	mx1hw.h	1233;"	dCS5_END_ADDR	mx1hw.h	1234;"	dCSCR	mx1hw.h	1254;"	dCSD0_BASE_ADDR	mx1hw.h	1219;"	dCSD0_END_ADDR	mx1hw.h	1220;"	dCSD1_BASE_ADDR	mx1hw.h	1221;"	dCSD1_END_ADDR	mx1hw.h	1222;"	dCSI_BASE_ADDR	mx1hw.h	460;"	dCSI_CTRL_REG1	mx1hw.h	461;"	dCSI_CTRL_REG2	mx1hw.h	462;"	dCSI_IRQ	csi2c.h	26;"	dCSI_ModuleInit	csi.c	/^static void CSI_ModuleInit(void)$/;"	f	file:CSI_ModuleInitDone	csi.c	/^static U32 CSI_ModuleInitDone = 0;$/;"	v	file:CSI_RX_FIFO	mx1hw.h	465;"	dCSI_STAT_FIFO	mx1hw.h	464;"	dCSI_STS_REG	mx1hw.h	463;"	dCSI_init	csi.c	/^void CSI_init(void)$/;"	fCSPI_2_BASE_ADDR	mx1hw.h	1175;"	dCSPI_2_INTCS	mx1hw.h	1179;"	dCSPI_2_SPICONT1	mx1hw.h	1178;"	dCSPI_2_SPIDMA	mx1hw.h	1182;"	dCSPI_2_SPIRESET	mx1hw.h	1183;"	dCSPI_2_SPIRXD	mx1hw.h	1176;"	dCSPI_2_SPISPCR	mx1hw.h	1181;"	dCSPI_2_SPITEST	mx1hw.h	1180;"	dCSPI_2_SPITXD	mx1hw.h	1177;"	dCSPI_BASE_ADDR	mx1hw.h	471;"	dCSPI_INTCS	mx1hw.h	475;"	dCSPI_SPICONT1	mx1hw.h	474;"	dCSPI_SPIDMA	mx1hw.h	478;"	dCSPI_SPIRESET	mx1hw.h	479;"	dCSPI_SPIRXD	mx1hw.h	472;"	dCSPI_SPISPCR	mx1hw.h	477;"	dCSPI_SPITEST	mx1hw.h	476;"	dCSPI_SPITXD	mx1hw.h	473;"	dCTRLD	mx1hw.h	1024;"	dDISABLE_FIQ	mx1hw.h	170;"	dDISABLE_IRQ	mx1hw.h	171;"	dDMA_BASE_ADDR	mx1hw.h	485;"	dDMA_BLR0	mx1hw.h	522;"	dDMA_BLR1	mx1hw.h	531;"	dDMA_BLR10	mx1hw.h	612;"	dDMA_BLR2	mx1hw.h	540;"	dDMA_BLR3	mx1hw.h	549;"	dDMA_BLR4	mx1hw.h	558;"	dDMA_BLR5	mx1hw.h	567;"	dDMA_BLR6	mx1hw.h	576;"	dDMA_BLR7	mx1hw.h	585;"	dDMA_BLR8	mx1hw.h	594;"	dDMA_BLR9	mx1hw.h	603;"	dDMA_BOSR	mx1hw.h	507;"	dDMA_BTOCR	mx1hw.h	508;"	dDMA_BTOSR	mx1hw.h	504;"	dDMA_BUCR0	mx1hw.h	524;"	dDMA_BUCR1	mx1hw.h	533;"	dDMA_BUCR10	mx1hw.h	614;"	dDMA_BUCR2	mx1hw.h	542;"	dDMA_BUCR3	mx1hw.h	551;"	dDMA_BUCR4	mx1hw.h	560;"	dDMA_BUCR5	mx1hw.h	569;"	dDMA_BUCR6	mx1hw.h	578;"	dDMA_BUCR7	mx1hw.h	587;"	dDMA_BUCR8	mx1hw.h	596;"	dDMA_BUCR9	mx1hw.h	605;"	dDMA_CCR0	mx1hw.h	520;"	dDMA_CCR1	mx1hw.h	529;"	dDMA_CCR10	mx1hw.h	610;"	dDMA_CCR2	mx1hw.h	538;"	dDMA_CCR3	mx1hw.h	547;"	dDMA_CCR4	mx1hw.h	556;"	dDMA_CCR5	mx1hw.h	565;"	dDMA_CCR6	mx1hw.h	574;"	dDMA_CCR7	mx1hw.h	583;"	dDMA_CCR8	mx1hw.h	592;"	dDMA_CCR9	mx1hw.h	601;"	dDMA_CH0_BASE	mx1hw.h	488;"	dDMA_CH10_BASE	mx1hw.h	498;"	dDMA_CH1_BASE	mx1hw.h	489;"	dDMA_CH2_BASE	mx1hw.h	490;"	dDMA_CH3_BASE	mx1hw.h	491;"	dDMA_CH4_BASE	mx1hw.h	492;"	dDMA_CH5_BASE	mx1hw.h	493;"	dDMA_CH6_BASE	mx1hw.h	494;"	dDMA_CH7_BASE	mx1hw.h	495;"	dDMA_CH8_BASE	mx1hw.h	496;"	dDMA_CH9_BASE	mx1hw.h	497;"	dDMA_CNTR0	mx1hw.h	519;"	dDMA_CNTR1	mx1hw.h	528;"	dDMA_CNTR10	mx1hw.h	609;"	dDMA_CNTR2	mx1hw.h	537;"	dDMA_CNTR3	mx1hw.h	546;"	dDMA_CNTR4	mx1hw.h	555;"	dDMA_CNTR5	mx1hw.h	564;"	dDMA_CNTR6	mx1hw.h	573;"	dDMA_CNTR7	mx1hw.h	582;"	dDMA_CNTR8	mx1hw.h	591;"	dDMA_CNTR9	mx1hw.h	600;"	dDMA_ChannelReEnable	dma_fun.c	/^void DMA_ChannelReEnable(U32 channel)$/;"	fDMA_DAR0	mx1hw.h	518;"	dDMA_DAR1	mx1hw.h	527;"	dDMA_DAR10	mx1hw.h	608;"	dDMA_DAR2	mx1hw.h	536;"	dDMA_DAR3	mx1hw.h	545;"	dDMA_DAR4	mx1hw.h	554;"	dDMA_DAR5	mx1hw.h	563;"	dDMA_DAR6	mx1hw.h	572;"	dDMA_DAR7	mx1hw.h	581;"	dDMA_DAR8	mx1hw.h	590;"	dDMA_DAR9	mx1hw.h	599;"	dDMA_DCR	mx1hw.h	501;"	dDMA_IMR	mx1hw.h	503;"	dDMA_ISR	mx1hw.h	502;"	dDMA_M2D_BASE	mx1hw.h	487;"	dDMA_ModuleInit	dma_fun.c	/^static void DMA_ModuleInit(void)$/;"	f	file:DMA_ModuleInitDone	dma_fun.c	/^static U32 DMA_ModuleInitDone = 0;$/;"	v	file:DMA_RSSR0	mx1hw.h	521;"	dDMA_RSSR1	mx1hw.h	530;"	dDMA_RSSR10	mx1hw.h	611;"	dDMA_RSSR2	mx1hw.h	539;"	dDMA_RSSR3	mx1hw.h	548;"	dDMA_RSSR4	mx1hw.h	557;"	dDMA_RSSR5	mx1hw.h	566;"	dDMA_RSSR6	mx1hw.h	575;"	dDMA_RSSR7	mx1hw.h	584;"	dDMA_RSSR8	mx1hw.h	593;"	dDMA_RSSR9	mx1hw.h	602;"	dDMA_RTOR0	mx1hw.h	523;"	dDMA_RTOR1	mx1hw.h	532;"	dDMA_RTOR10	mx1hw.h	613;"	dDMA_RTOR2	mx1hw.h	541;"	dDMA_RTOR3	mx1hw.h	550;"	dDMA_RTOR4	mx1hw.h	559;"	dDMA_RTOR5	mx1hw.h	568;"	dDMA_RTOR6	mx1hw.h	577;"	dDMA_RTOR7	mx1hw.h	586;"	dDMA_RTOR8	mx1hw.h	595;"	d