?? ixp425.tim
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Performance Summary Report
--------------------------
Design: ixp425
Device: XC9572XL-10-VQ64
Speed File: Version 1.0
Program: Timing Report Generator: version D.19
Date: Thu Jun 30 13:54:11 2005
Performance Summary:
Pad to Pad (tPD) : 10.0ns (1 macrocell levels)
Pad '\$Net00051_' to Pad '\$Net00022_'
--------------------------------------------------------------------------------
Pad to Pad (tPD) (nsec)
\ From \ \ \ \ \ \ \ \ \ \
\ $ $ $ $ $ $ $ $ $ $
\ N N N N N N N N N N
\ e e e e e e e e e e
\ t t t t t t t t t t
\ 0 0 0 0 0 0 0 0 0 0
\ 0 0 0 0 0 0 0 0 0 0
\ 0 0 0 0 0 0 0 0 0 1
\ 0 1 2 2 3 3 4 5 5 2
\ 1 9 1 9 0 1 9 1 2 9
\ _ _ _ _ _ _ _ _ _ _
To \------------------------------------------------------------
\$Net00002_ 10.0
\$Net00003_ 10.0
\$Net00016_ 10.0
\$Net00017_ 10.0 10.0 10.0 10.0 10.0
\$Net00022_ 10.0 10.0 10.0 10.0
\$Net00071_ 10.0
\$Net00073_ 10.0
\$Net00079_ 10.0
\$Net00080_ 10.0 10.0
Path Type Definition:
Pad to Pad (tPD) - Reports pad to pad paths that start
at input pads and end at output pads.
Paths are not traced through
registers.
Clock Pad to Output Pad (tCO) - Reports paths that start at input
pads trace through clock inputs of
registers and end at output pads.
Paths are not traced through PRE/CLR
inputs of registers.
Setup to Clock at Pad (tSU) - Reports external setup time of data
to clock at pad. Data path starts at
an input pad and end at register D/T
input. Clock path starts at input pad
and ends at the register clock input.
Paths are not traced through
registers.
Clock to Setup (tCYC) - Register to register cycle time.
Include source register tCO and
destination register tSU.
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