?? f2812regs_c.h
字號:
#define CANMDH19 ((REGS32U)0x00619E)
#define CANMID20 ((REGS32U)0x0061A0) //郵箱20
#define CANMCF20 ((REGS32U)0x0061A2)
#define CANMDL20 ((REGS32U)0x0061A4)
#define CANMDH20 ((REGS32U)0x0061A6)
#define CANMID21 ((REGS32U)0x0061A8) //郵箱21
#define CANMCF21 ((REGS32U)0x0061AA)
#define CANMDL21 ((REGS32U)0x0061AC)
#define CANMDH21 ((REGS32U)0x0061AE)
#define CANMID22 ((REGS32U)0x0061B0) //郵箱22
#define CANMCF22 ((REGS32U)0x0061B2)
#define CANMDL22 ((REGS32U)0x0061B4)
#define CANMDH22 ((REGS32U)0x0061B6)
#define CANMID23 ((REGS32U)0x0061B8) //郵箱23
#define CANMCF23 ((REGS32U)0x0061BA)
#define CANMDL23 ((REGS32U)0x0061BC)
#define CANMDH23 ((REGS32U)0x0061BE)
#define CANMID24 ((REGS32U)0x0061C0) //郵箱24
#define CANMCF24 ((REGS32U)0x0061C2)
#define CANMDL24 ((REGS32U)0x0061C4)
#define CANMDH24 ((REGS32U)0x0061C6)
#define CANMID25 ((REGS32U)0x0061C8) //郵箱25
#define CANMCF25 ((REGS32U)0x0061CA)
#define CANMDL25 ((REGS32U)0x0061CC)
#define CANMDH25 ((REGS32U)0x0061CE)
#define CANMID26 ((REGS32U)0x0061D0) //郵箱26
#define CANMCF26 ((REGS32U)0x0061D2)
#define CANMDL26 ((REGS32U)0x0061D4)
#define CANMDH26 ((REGS32U)0x0061D6)
#define CANMID27 ((REGS32U)0x0061D8) //郵箱27
#define CANMCF27 ((REGS32U)0x0061DA)
#define CANMDL27 ((REGS32U)0x0061DC)
#define CANMDH27 ((REGS32U)0x0061DE)
#define CANMID28 ((REGS32U)0x0061E0) //郵箱28
#define CANMCF28 ((REGS32U)0x0061E2)
#define CANMDL28 ((REGS32U)0x0061E4)
#define CANMDH28 ((REGS32U)0x0061E6)
#define CANMID29 ((REGS32U)0x0061E8) //郵箱29
#define CANMCF29 ((REGS32U)0x0061EA)
#define CANMDL29 ((REGS32U)0x0061EC)
#define CANMDH29 ((REGS32U)0x0061EE)
#define CANMID30 ((REGS32U)0x0061F0) //郵箱30
#define CANMCF30 ((REGS32U)0x0061F2)
#define CANMDL30 ((REGS32U)0x0061F4)
#define CANMDH30 ((REGS32U)0x0061F6)
#define CANMID31 ((REGS32U)0x0061F8) //郵箱31
#define CANMCF31 ((REGS32U)0x0061FA)
#define CANMDL31 ((REGS32U)0x0061FC)
#define CANMDH31 ((REGS32U)0x0061FE)
/*--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/*定義PLL、時鐘模塊、看門狗模塊、低功耗模塊寄存器*/
/*--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define HISPCP ((REGS16U)0x00701A) /* High-Speed Peripheral Clock Prescaler Register for HSPCLK clock */
#define LOSPCP ((REGS16U)0x00701B) /* Low-Speed Peripheral Clock Prescaler Register for HSPCLK clock */
#define PCLKCR ((REGS16U)0x00701C) /* Peripheral Clock Control Register */
#define LPMCR0 ((REGS16U)0x00701E) /* Low Power Mode Control Register 0 */
#define LPMCR1 ((REGS16U)0x00701F) /* Low Power Mode Control Register 1 */
#define PLLCR ((REGS16U)0x007021) /* PLL Control Register */
#define SCSR ((REGS16U)0x007022) /* System Control & Status Register */
#define WDCNTR ((REGS16U)0x007023) /* Watchdog Counter Register */
#define WDKEY ((REGS16U)0x007025) /* Watchdog Reset Key Register */
#define WDCR ((REGS16U)0x007029) /* Watchdog Control Register */
/*--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/*定義外部中斷控制寄存器*/
/*--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define XINT1CR ((REGS16U)0x007070) /* XINT1 control register */
#define XINT2CR ((REGS16U)0x007071) /* XINT2 control register */
#define XNMICR ((REGS16U)0x007077) /* XNMI control register */
#define XINT1CTR ((REGS16U)0x007078) /* XINT1 counter register */
#define XINT2CTR ((REGS16U)0x007079) /* XINT2 counter register */
#define XNMICTR ((REGS16U)0x00707F) /* XNMI counter register */
/*--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/*定義數字I/O控制寄存器*/
/*--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define GPAMUX ((REGS16U)0x0070C0) /* GPIO A Mux Control Register */
#define GPADIR ((REGS16U)0x0070C1) /* GPIO A Direction Control Register */
#define GPAQUAL ((REGS16U)0x0070C2) /* GPIO A Input Qualification Control Register */
/*-----------------------------*/
#define GPBMUX ((REGS16U)0x0070C4) /* GPIO B Mux Control Register */
#define GPBDIR ((REGS16U)0x0070C5) /* GPIO B Direction Control Register */
#define GPBQUAL ((REGS16U)0x0070C6) /* GPIO B Input Qualification Control Register */
/*-----------------------------*/
#define GPDMUX ((REGS16U)0x0070CC) /* GPIO D Mux Control Register */
#define GPDDIR ((REGS16U)0x0070CD) /* GPIO D Direction Control Register */
#define GPDQUAL ((REGS16U)0x0070CE) /* GPIO D Input Qualification Control Register */
/*-----------------------------*/
#define GPEMUX ((REGS16U)0x0070D0) /* GPIO E Mux Control Register */
#define GPEDIR ((REGS16U)0x0070D1) /* GPIO E Direction Control Register */
#define GPEQUAL ((REGS16U)0x0070D2) /* GPIO E Input Qualification Control Register */
/*-----------------------------*/
#define GPFMUX ((REGS16U)0x0070D4) /* GPIO F Mux Control Register */
#define GPFDIR ((REGS16U)0x0070D5) /* GPIO F Direction Control Register */
/*-----------------------------*/
#define GPGMUX ((REGS16U)0x0070D8) /* GPIO G Mux Control Register */
#define GPGDIR ((REGS16U)0x0070D9) /* GPIO G Direction Control Register */
/*-----------------------------*/
#define GPADAT ((REGS16U)0x0070E0) /* GPIO A Data Register */
#define GPASET ((REGS16U)0x0070E1) /* GPIO A Set Register */
#define GPACLEAR ((REGS16U)0x0070E2) /* GPIO A Clear Register */
#define GPATOGGLE ((REGS16U)0x0070E3) /* GPIO A Toggle Register */
/*-----------------------------*/
#define GPBDAT ((REGS16U)0x0070E4) /* GPIO B Data Register */
#define GPBSET ((REGS16U)0x0070E5) /* GPIO B Set Register */
#define GPBCLEAR ((REGS16U)0x0070E6) /* GPIO B Clear Register */
#define GPBTOGGLE ((REGS16U)0x0070E7) /* GPIO B Toggle Register */
/*-----------------------------*/
#define GPDDAT ((REGS16U)0x0070EC) /* GPIO D Data Register */
#define GPDSET ((REGS16U)0x0070ED) /* GPIO D Set Register */
#define GPDCLEAR ((REGS16U)0x0070EE) /* GPIO D Clear Register */
#define GPDTOGGLE ((REGS16U)0x0070EF) /* GPIO D Toggle Register */
/*-----------------------------*/
#define GPEDAT ((REGS16U)0x0070F0) /* GPIO E Data Register */
#define GPESET ((REGS16U)0x0070F1) /* GPIO E Set Register */
#define GPECLEAR ((REGS16U)0x0070F2) /* GPIO E Clear Register */
#define GPETOGGLE ((REGS16U)0x0070F3) /* GPIO E Toggle Register */
/*-----------------------------*/
#define GPFDAT ((REGS16U)0x0070F4) /* GPIO F Data Register */
#define GPFSET ((REGS16U)0x0070F5) /* GPIO F Set Register */
#define GPFCLEAR ((REGS16U)0x0070F6) /* GPIO F Clear Register */
#define GPFTOGGLE ((REGS16U)0x0070F7) /* GPIO F Toggle Register */
/*-----------------------------*/
#define GPGDAT ((REGS16U)0x0070F8) /* GPIO G Data Register */
#define GPGSET ((REGS16U)0x0070F9) /* GPIO G Set Register */
#define GPGCLEAR ((REGS16U)0x0070FA) /* GPIO G Clear Register */
#define GPGTOGGLE ((REGS16U)0x0070FB) /* GPIO G Toggle Register */
/*--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/*A/D轉換器控制寄存器*/
/*--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define ADCTRL1 ((REGS16U)0x007100) /* ADC Control & Status reg */
#define ADCTRL2 ((REGS16U)0x007101) /* ADC Configuration reg */
#define ADCMAXCONV ((REGS16U)0x007102) /* ADC Maximum Conversion Channels Register */
#define ADCCHSELSEQ1 ((REGS16U)0x007103) /* ADC Channel Select Sequencing Control Register 1 */
#define ADCCHSELSEQ2 ((REGS16U)0x007104) /* ADC Channel Select Sequencing Control Register 2 */
#define ADCCHSELSEQ3 ((REGS16U)0x007105) /* ADC Channel Select Sequencing Control Register 3 */
#define ADCCHSELSEQ4 ((REGS16U)0x007106) /* ADC Channel Select Sequencing Control Register 4 */
#define ADCASEQSR ((REGS16U)0x007107) /* ADC Auto–Sequence Status Register */
#define ADCRESULT0 ((REGS16U)0x007108) /* ADC Conversion Result Buffer Register 0 */
#define ADCRESULT1 ((REGS16U)0x007109) /* ADC Conversion Result Buffer Register 1 */
#define ADCRESULT2 ((REGS16U)0x00710A) /* ADC Conversion Result Buffer Register 2 */
#define ADCRESULT3 ((REGS16U)0x00710B) /* ADC Conversion Result Buffer Register 3 */
#define ADCRESULT4 ((REGS16U)0x00710C) /* ADC Conversion Result Buffer Register 4 */
#define ADCRESULT5 ((REGS16U)0x00710D) /* ADC Conversion Result Buffer Register 5 */
#define ADCRESULT6 ((REGS16U)0x00710E) /* ADC Conversion Result Buffer Register 6 */
#define ADCRESULT7 ((REGS16U)0x00710F) /* ADC Conversion Result Buffer Register 7 */
#define ADCRESULT8 ((REGS16U)0x007110) /* ADC Conversion Result Buffer Register 8 */
#define ADCRESULT9 ((REGS16U)0x007111) /* ADC Conversion Result Buffer Register 9 */
#define ADCRESULT10 ((REGS16U)0x007112) /* ADC Conversion Result Buffer Register 10 */
#define ADCRESULT11 ((REGS16U)0x007113) /* ADC Conversion Result Buffer Register 11 */
#define ADCRESULT12 ((REGS16U)0x007114) /* ADC Conversion Result Buffer Register 12 */
#define ADCRESULT13 ((REGS16U)0x007115) /* ADC Conversion Result Buffer Register 13 */
#define ADCRESULT14 ((REGS16U)0x007116) /* ADC Conversion Result Buffer Register 14 */
#define ADCRESULT15 ((REGS16U)0x007117) /* ADC Conversion Result Buffer Register 15 */
/*#define ADCCALOFF0 ((REGS16U)0x007118) */ /* ADC Calibration Offset Result 0 */
/*#define ADCCALOFF1 ((REGS16U)0x007119) */ /* ADC Calibration Offset Result 1 */
#define ADCTRL3 ((REGS16U)0x007118) /* ADC Control Register 3 */
#define ADCST ((REGS16U)0x007119) /* ADC Status Register */
/*--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
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