?? csl_dat_.sa
字號:
SHL serialNumber,16,id
OR id,slotNumber,id
;Load up base address of DMA registers
LDW *stateAddr(State.baseAddr),qdmaBase
;Store source address
STW value,*qdmaBase[SRC]
;Store destination address
STW dst,*qdmaBase[DST]
;store index
; MVKL 0x00000000,Y
; MVKH 0x00000000,Y
ZERO Y
STW Y,*qdmaBase[IDX]
;Calculate argument alignment
OR dst,byteCnt,alignment
OR value,alignment,alignment
AND alignment,3,alignment
DAT_FILL_32:
;Check to see if 32-bit aligned, branch if not
CMPEQ alignment,0,pred
[!pred] B DAT_FILL_16
;Store transfer count
SHRU byteCnt,2,X
STW X,*qdmaBase[CNT]
;Store option register into pseudo space to kick off transfer
MVKL 0x00200000,Y
MVKH 0x00200000,Y
SHL slotNumber,16,X
OR X,Y,Y
OR Y,initOpt,Y
STW Y,*qdmaBase[OPT]
;All done so go to procedure exit code
B DAT_FILL_RETURN
DAT_FILL_16:
;Check to see if 16-bit aligned, branch if not
CMPEQ alignment,2,pred
[!pred] B DAT_FILL_8
;Store transfer count
SHRU byteCnt,1,X
STW X,*qdmaBase[CNT]
;Store option register into pseudo space to kick off transfer
MVKL 0x08200000,Y
MVKH 0x08200000,Y
SHL slotNumber,16,X
OR X,Y,Y
OR Y,initOpt,Y
STW Y,*qdmaBase[OPT]
;All done so go to procedure exit code
B DAT_FILL_RETURN
DAT_FILL_8:
;Must be 8-bit aligned since it wasn't 32 or 16 bit aligned
;Store transfer count
STW byteCnt,*qdmaBase[CNT]
;Store option register into pseudo space to kick off transfer
MVKL 0x10200000,Y
MVKH 0x10200000,Y
SHL slotNumber,16,X
OR X,Y,Y
OR Y,initOpt,Y
STW Y,*qdmaBase[OPT]
DAT_FILL_RETURN:
;Restore GIE
MVC CSR,X
OR X,gieSave,X
MVC X,CSR
.return id
.endproc
*------------------------------------------------------------------------------*
* Uint32 DAT_copy(void *src , void *dst , Uint16 byteCnt);
*------------------------------------------------------------------------------*
_DAT_copy .cproc src, dst, byteCnt
.reg gieSave
.reg X,Y
.reg const31
.reg stateAddr
.reg useMask
.reg slotNumber
.reg serialNumber
.reg tableAddr
.reg oldSerialNumber
.reg pred
.reg mask
.reg id
.reg alignment
.reg qdmaBase
.reg initOpt
.reg ciprAddr
;Load useMask and Initial primary control register
MVKL __DAT_stateStruct,stateAddr
MVKH __DAT_stateStruct,stateAddr
LDW *stateAddr(State.useMask),useMask
LDW *stateAddr(State.initOpt),initOpt
;Constant needed later
MVK 31,const31
MVKL 0x01A0FFE4,ciprAddr
MVKH 0x01A0FFE4,ciprAddr
; MVK 1, pred
;DAT_COPY_LOOP1:
; ;Wait for a free slot to open up
; [pred] LDW *ciprAddr,cipr
; AND cipr,useMask,X
; LMBD 1,X,X
; SUB const31,X,slotNumber
; CMPEQ slotNumber,-1,pred
; [pred] B DAT_COPY_LOOP1
ZERO pred
DAT_COPY_LOOP1:
;Wait for a free slot to open up
[!pred] LDW *ciprAddr,cipr
AND cipr,useMask,pred
[!pred] B DAT_COPY_LOOP1
LMBD 1,pred,X
SUB const31,X,slotNumber
;Save and clear GIE
MVC CSR,X
AND X,1,gieSave
AND X,-2,X
MVC X,CSR
;Generate mask from slot number
MVK 1,mask
SHL mask,slotNumber,mask
;Clear interrupt pending flag
STW mask,*ciprAddr
;Load up serial number table address
MVKL __DAT_serialTable,tableAddr
MVKH __DAT_serialTable,tableAddr
LDHU *tableAddr[slotNumber],oldSerialNumber
;Add one to serial numer and store it back into the table
ADD oldSerialNumber,1,serialNumber
STH serialNumber,*tableAddr[slotNumber]
;Construct transfer id from serial number and slot number
SHL serialNumber,16,id
OR id,slotNumber,id
;Load up base address of DMA registers
LDW *stateAddr(State.baseAddr),qdmaBase
;Store source address
STW src,*qdmaBase[SRC]
;Store destination address
STW dst,*qdmaBase[DST]
;store index
MVKL 0x00000000,Y
MVKH 0x00000000,Y
STW Y,*qdmaBase[IDX]
;Calculate argument alignment
OR dst,byteCnt,alignment
OR src,alignment,alignment
AND alignment,3,alignment
DAT_COPY_32:
;Check to see if 32-bit aligned, branch if not
CMPEQ alignment,0,pred
[!pred] B DAT_COPY_16
;Store transfer count
SHRU byteCnt,2,X
STW X,*qdmaBase[CNT]
;Store option register into pseudo space to kick off transfer
MVKL 0x01200000,Y
MVKH 0x01200000,Y
SHL slotNumber,16,X
OR X,Y,Y
OR Y,initOpt,Y
STW Y,*qdmaBase[OPT]
;All done so go to procedure exit code
B DAT_COPY_RETURN
DAT_COPY_16:
;Check to see if 16-bit aligned, branch if not
CMPEQ alignment,2,pred
[!pred] B DAT_COPY_8
;Store transfer count
SHRU byteCnt,1,X
STW X,*qdmaBase[CNT]
;Store option register into pseudo space to kick off transfer
MVKL 0x09200000,Y
MVKH 0x09200000,Y
SHL slotNumber,16,X
OR X,Y,Y
OR Y,initOpt,Y
STW Y,*qdmaBase[OPT]
;All done so go to procedure exit code
B DAT_COPY_RETURN
DAT_COPY_8:
;Must be 8-bit aligned since it wasn't 32 or 16 bit aligned
;Store transfer count
STW byteCnt,*qdmaBase[CNT]
;Store option register into pseudo space to kick off transfer
MVKL 0x11200000,Y
MVKH 0x11200000,Y
SHL slotNumber,16,X
OR X,Y,Y
OR Y,initOpt,Y
STW Y,*qdmaBase[OPT]
DAT_COPY_RETURN:
;Restore GIE
MVC CSR,X
OR X,gieSave,X
MVC X,CSR
.return id
.endproc
*------------------------------------------------------------------------------*
* Uint32 DAT_copy2d(Uint32 type, void *src, void *dst, Uint16 lineLen,
* Uint16 lineCnt, Uint16 linePitch);
*------------------------------------------------------------------------------*
_DAT_copy2d .cproc type, src, dst, lineLen, lineCnt, linePitch
.reg gieSave
.reg X,Y
.reg const31
.reg stateAddr
.reg useMask
.reg slotNumber
.reg serialNumber
.reg tableAddr
.reg oldSerialNumber
.reg pred
.reg mask
.reg cipr
.reg id
.reg alignment
.reg qdmaBase
.reg initOpt
.reg ciprAddr
;Load useMask and Initial primary control register
MVKL __DAT_stateStruct,stateAddr
MVKH __DAT_stateStruct,stateAddr
LDW *stateAddr(State.useMask),useMask
LDW *stateAddr(State.initOpt),initOpt
;Constant needed later
MVK 31,const31
;address of the channel interrupt pending register
MVKL 0x01A0FFE4,ciprAddr
MVKH 0x01A0FFE4,ciprAddr
; MVK 1,pred
;DAT_COPY2D_LOOP1:
; ;Wait for a free slot to open up
; [pred] LDW *ciprAddr,cipr
; AND cipr,useMask,X
; LMBD 1,X,X
; SUB const31,X,slotNumber
; CMPEQ slotNumber,-1,pred
; [pred] B DAT_COPY2D_LOOP1
ZERO pred
DAT_COPY2D_LOOP1:
;Wait for a free slot to open up
[!pred] LDW *ciprAddr,cipr
AND cipr,useMask,pred
[!pred] B DAT_COPY2D_LOOP1
LMBD 1,pred,X
SUB const31,X,slotNumber
;Save and clear GIE
MVC CSR,X
AND X,1,gieSave
AND X,-2,X
MVC X,CSR
;Generate mask from slot number
MVK 1,mask
SHL mask,slotNumber,mask
;Clear interrupt pending flag
STW mask,*ciprAddr
;Load up serial number table address
MVKL __DAT_serialTable,tableAddr
MVKH __DAT_serialTable,tableAddr
LDHU *tableAddr[slotNumber],oldSerialNumber
;Add one to serial numer and store it back into the table
ADD oldSerialNumber,1,serialNumber
STH serialNumber,*tableAddr[slotNumber]
;Construct transfer id from serial number and slot number
SHL serialNumber,16,id
OR id,slotNumber,id
;Load up base address of DMA registers
LDW *stateAddr(State.baseAddr),qdmaBase
;Store source address
STW src,*qdmaBase[SRC]
;Store destination address
STW dst,*qdmaBase[DST]
;Calculate argument alignment
OR dst,lineLen,alignment
OR src,alignment,alignment
OR linePitch,alignment,alignment
AND alignment,3,alignment
DAT_COPY2D_32:
;Check to see if 32-bit aligned, branch if not
CMPEQ alignment,0,pred
[!pred] B DAT_COPY2D_16
;Store transfer count
SHRU lineLen,2,X
SUB lineCnt,1,Y
SHL Y,16,Y
OR X,Y,X
STW X,*qdmaBase[CNT]
;Store index register
SUB linePitch,lineLen,X
SHL X,16,X
STW X,*qdmaBase[IDX]
;Store option register into pseudo space to kick off transfer
; MVKL 0x00000000,Y
; MVKH 0x00000000,Y
ZERO Y
SHL slotNumber,16,X
OR X,Y,Y
OR type,Y,Y
OR Y,initOpt,Y
STW Y,*qdmaBase[OPT]
;All done so go to procedure exit code
B DAT_COPY2D_RETURN
DAT_COPY2D_16:
;Check to see if 16-bit aligned, branch if not
CMPEQ alignment,2,pred
[!pred] B DAT_COPY2D_8
;Store transfer count
SHRU lineLen,1,X
SUB lineCnt,1,Y
SHL Y,16,Y
OR X,Y,X
STW X,*qdmaBase[CNT]
;Store index register
SUB linePitch,lineLen,X
SHL X,16,X
STW X,*qdmaBase[IDX]
;Store option register into pseudo space to kick off transfer
MVKL 0x08000000,Y
MVKH 0x08000000,Y
SHL slotNumber,16,X
OR X,Y,Y
OR type,Y,Y
OR Y,initOpt,Y
STW Y,*qdmaBase[OPT]
;All done so go to procedure exit code
B DAT_COPY2D_RETURN
DAT_COPY2D_8:
;Must be 8-bit aligned since it wasn't 32 or 16 bit aligned
;Store transfer count
SHRU lineLen,0,X
SUB lineCnt,1,Y
SHL Y,16,Y
OR X,Y,X
STW X,*qdmaBase[CNT]
;Store index register
SUB linePitch,lineLen,X
SHL X,16,X
STW X,*qdmaBase[IDX]
;Store option register into pseudo space to kick off transfer
MVKL 0x10000000,Y
MVKH 0x10000000,Y
SHL slotNumber,16,X
OR X,Y,Y
OR type,Y,Y
OR Y,initOpt,Y
STW Y,*qdmaBase[OPT]
DAT_COPY2D_RETURN:
;Restore GIE
MVC CSR,X
OR X,gieSave,X
MVC X,CSR
.return id
.endproc
*------------------------------------------------------------------------------*
.endif ;EDMA_SUPPORT
.endif ;DAT_SUPPORT
********************************************************************************
* End of csl_dat_.sa
********************************************************************************
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