?? main.lis
字號:
.module main.c
.area data(ram, con, rel)
0000 _flag::
0000 .blkb 1
.area idata
0000 00 .byte 0
.area data(ram, con, rel)
0001 .dbfile D:\xb_work\標(biāo)準(zhǔn)速度測試儀\speed_mega8\C_file\main.c
0001 .dbsym e flag _flag c
.area text(rom, con, rel)
0000 .dbfile D:\xb_work\標(biāo)準(zhǔn)速度測試儀\speed_mega8\C_file\main.c
0000 .dbfunc e port_init _port_init fV
.even
0000 _port_init::
0000 .dbline -1
0000 .dbline 11
0000 ; //ICC-AVR application builder : 2006-10-11 上午 11:30:40
0000 ; // Target : M8
0000 ; // Crystal: 6.0000Mhz
0000 ;
0000 ; #include <iom8v.h>
0000 ; #include <macros.h>
0000 ;
0000 ; unsigned char flag =0;
0000 ;
0000 ; void port_init(void)
0000 ; {
0000 .dbline 12
0000 ; PORTB = 0x00;
0000 2224 clr R2
0004 .dbline 13
0004 ; DDRB = 0x00;
0004 27BA out 0x17,R2
0006 .dbline 14
0006 ; PORTC = 0x00; //m103 output only
0006 25BA out 0x15,R2
0008 .dbline 15
0008 ; DDRC = 0x00;
0008 24BA out 0x14,R2
000A .dbline 16
000A ; PORTD = 0x00;
000A 22BA out 0x12,R2
000C .dbline 17
000C ; DDRD = 0x00;
000C 21BA out 0x11,R2
000E .dbline -2
000E L1:
000E .dbline 0 ; func end
000E 0895 ret
0010 .dbend
0010 .dbfunc e watchdog_init _watchdog_init fV
.even
0010 _watchdog_init::
0010 .dbline -1
0010 .dbline 23
0010 ; }
0010 ;
0010 ; //Watchdog initialize
0010 ; // prescale: 16K
0010 ; void watchdog_init(void)
0010 ; {
0010 .dbline 24
0010 ; WDR(); //this prevents a timout on enabling
0010 A895 wdr
0012 .dbline 25
0012 ; WDTCR = 0x08; //WATCHDOG ENABLED - dont forget to issue WDRs
0012 88E0 ldi R24,8
0014 81BD out 0x21,R24
0016 .dbline -2
0016 L2:
0016 .dbline 0 ; func end
0016 0895 ret
0018 .dbend
0018 .dbfunc e timer1_init _timer1_init fV
.even
0018 _timer1_init::
0018 .dbline -1
0018 .dbline 33
0018 ; }
0018 ;
0018 ; //TIMER1 initialize - prescale:1
0018 ; // WGM: 0) Normal, TOP=0xFFFF
0018 ; // desired value: 320Hz
0018 ; // actual value: 320.000Hz (0.0%)
0018 ; void timer1_init(void)
0018 ; {
0018 .dbline 34
0018 ; TCCR1B = 0x00; //stop
0018 2224 clr R2
001A 2EBC out 0x2e,R2
001C .dbline 35
001C ; TCNT1H = 0xD8; //setup
001C 88ED ldi R24,216
001E 8DBD out 0x2d,R24
0020 .dbline 36
0020 ; TCNT1L = 0xF0;
0020 80EF ldi R24,240
0022 8CBD out 0x2c,R24
0024 .dbline 37
0024 ; OCR1AH = 0x27;
0024 87E2 ldi R24,39
0026 8BBD out 0x2b,R24
0028 .dbline 38
0028 ; OCR1AL = 0x10;
0028 80E1 ldi R24,16
002A 8ABD out 0x2a,R24
002C .dbline 39
002C ; OCR1BH = 0x27;
002C 87E2 ldi R24,39
002E 89BD out 0x29,R24
0030 .dbline 40
0030 ; OCR1BL = 0x10;
0030 80E1 ldi R24,16
0032 88BD out 0x28,R24
0034 .dbline 41
0034 ; ICR1H = 0x27;
0034 87E2 ldi R24,39
0036 87BD out 0x27,R24
0038 .dbline 42
0038 ; ICR1L = 0x10;
0038 80E1 ldi R24,16
003A 86BD out 0x26,R24
003C .dbline 43
003C ; TCCR1A = 0x00;
003C 2FBC out 0x2f,R2
003E .dbline 44
003E ; TCCR1B = 0x01; //start Timer
003E 81E0 ldi R24,1
0040 8EBD out 0x2e,R24
0042 .dbline -2
0042 L3:
0042 .dbline 0 ; func end
0042 0895 ret
0044 .dbend
.area vector(rom, abs)
.org 16
0010 22C0 rjmp _timer1_ovf_isr
.area text(rom, con, rel)
0044 .dbfile D:\xb_work\標(biāo)準(zhǔn)速度測試儀\speed_mega8\C_file\main.c
0044 .dbfunc e timer1_ovf_isr _timer1_ovf_isr fV
.even
0044 _timer1_ovf_isr::
0044 2A92 st -y,R2
0046 8A93 st -y,R24
0048 2FB6 in R2,0x3f
004A 2A92 st -y,R2
004C .dbline -1
004C .dbline 49
004C ; }
004C ;
004C ; #pragma interrupt_handler timer1_ovf_isr:9
004C ; void timer1_ovf_isr(void)
004C ; {
004C .dbline 51
004C ; //TIMER1 has overflowed
004C ; TCNT1H = 0xD8;
004C 88ED ldi R24,216
004E 8DBD out 0x2d,R24
0050 .dbline 52
0050 ; TCNT1L = 0xF0;
0050 80EF ldi R24,240
0052 8CBD out 0x2c,R24
0054 .dbline 55
0054 ;
0054 ;
0054 ; if(flag ==0)
0054 20900000 lds R2,_flag
0058 2220 tst R2
005A 29F4 brne L5
005C .dbline 56
005C ; {
005C .dbline 57
005C ; PORTD |= 0x04;
005C 929A sbi 0x12,2
005E .dbline 58
005E ; flag =1;
005E 81E0 ldi R24,1
0060 80930000 sts _flag,R24
0064 .dbline 59
0064 ; }else
0064 04C0 rjmp L6
0066 L5:
0066 .dbline 60
0066 .dbline 61
0066 9298 cbi 0x12,2
0068 .dbline 62
0068 2224 clr R2
006A 20920000 sts _flag,R2
006E .dbline 63
006E L6:
006E .dbline -2
006E L4:
006E 2990 ld R2,y+
0070 2FBE out 0x3f,R2
0072 8991 ld R24,y+
0074 2990 ld R2,y+
0076 .dbline 0 ; func end
0076 1895 reti
0078 .dbend
0078 .dbfunc e init_devices _init_devices fV
.even
0078 _init_devices::
0078 .dbline -1
0078 .dbline 69
0078 ; {
0078 ; PORTD &= ~(0x04);
0078 ; flag =0;
0078 ; }
0078 ;
0078 ; }
0078 ;
0078 ; //call this routine to initialize all peripherals
0078 ; void init_devices(void)
0078 ; {
0078 .dbline 71
0078 ; //stop errant interrupts until set up
0078 ; CLI(); //disable all interrupts
0078 F894 cli
007A .dbline 72
007A ; port_init();
007A C2DF rcall _port_init
007C .dbline 73
007C ; watchdog_init();
007C C9DF rcall _watchdog_init
007E .dbline 74
007E ; timer1_init();
007E CCDF rcall _timer1_init
0080 .dbline 76
0080 ;
0080 ; MCUCR = 0x00;
0080 2224 clr R2
0082 25BE out 0x35,R2
0084 .dbline 77
0084 ; GICR = 0x00;
0084 2BBE out 0x3b,R2
0086 .dbline 78
0086 ; TIMSK = 0x04; //timer interrupt sources
0086 84E0 ldi R24,4
0088 89BF out 0x39,R24
008A .dbline 79
008A ; SEI(); //re-enable interrupts
008A 7894 sei
008C .dbline -2
008C L7:
008C .dbline 0 ; func end
008C 0895 ret
008E .dbend
008E .dbfunc e main _main fV
.even
008E _main::
008E .dbline -1
008E .dbline 85
008E ; //all peripherals are now initialized
008E ; }
008E ;
008E ; //************************************************************
008E ; void main(void)
008E ; {
008E .dbline 86
008E ; init_devices();
008E F4DF rcall _init_devices
0090 .dbline 87
0090 ; DDRD |= 0x04;
0090 8A9A sbi 0x11,2
0092 .dbline 88
0092 ; PORTD |= 0x04;
0092 929A sbi 0x12,2
0094 .dbline 89
0094 ; flag =1;
0094 81E0 ldi R24,1
0096 80930000 sts _flag,R24
009A 01C0 rjmp L10
009C L9:
009C .dbline 92
009C .dbline 93
009C A895 wdr
009E .dbline 94
009E L10:
009E .dbline 91
009E FECF rjmp L9
00A0 X0:
00A0 .dbline -2
00A0 L8:
00A0 .dbline 0 ; func end
00A0 0895 ret
00A2 .dbend
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